rev.
page
date
1 of 3
09/2007
PART NUMBER:
VDSD1-DIP series
DESCRIPTION:
DC/DC converter
description
Designed to convert fixed volt-
ages into an isolated voltage, the
VDSD1-DIP series is well suited
for providing board-mount local
supplies in a wide range of appli-
cations, including mixed
analog/digital circuits, test &
measurement equip.,
process/machine controls, data-
com/telecom fields, etc...
The semi-regulated output can be
followed by 3-terminal regulators
to provide output protection, in
addition to output regulation.
features
·
isolated 1
W output
·temperature range: -40°C~+85°C
·unregulated
·high efficiency to 80%
·dual independent voltage output
·small footprint
·DIP package style
·industry standard pinout
·UL94-V0 package
·no heatsink required
·1K Vdc isolation
·power density 0.85 W/cm³
·no external component required
·low cost
model
number
VDSD1-S5-DI5-DIP
VDSD1-S5-DI9-DIP
VDSD1-S5-DI12-DIP
VDSD1-S5-DI15-DIP
VDSD1-S12-DI5-DIP
VDSD1-S12-DI9-DIP
VDSD1-S12-DI12-DIP
VDSD1-S12-DI15-DIP
VDSD1-S15-DI5-DIP
VDSD1-S15-DI9-DIP
VDSD1-S15-DI12-DIP
VDSD1-S15-DI15-DIP
VDSD1-S24-DI5-DIP
VDSD1-S24-DI9-DIP
VDSD1-S24-DI12-DIP
VDSD1-S24-DI15-DIP
input voltage
nominal
range
5 Vdc
4.5~5.5 Vdc
5 Vdc
4.5~5.5 Vdc
5 Vdc
5 Vdc
12 Vdc
12 Vdc
12
12
15
15
15
15
24
24
24
24
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
4.5~5.5 Vdc
4.5~5.5 Vdc
10.8~13.2 Vdc
10.8~13.2 Vdc
10.8~13.2
10.8~13.2
13.5~16.5
13.5~16.5
13.5~16.5
13.5~16.5
21.6~26.4
21.6~26.4
21.6~26.4
21.6~26.4
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
output
voltage
5, 5 Vdc
9, 9 Vdc
12,
15,
5,
9,
12,
15,
5,
9,
12,
15,
5,
9,
12,
15,
12 Vdc
15 Vdc
5 Vdc
9 Vdc
12 Vdc
15 Vdc
5 Vdc
9 Vdc
12 Vdc
15 Vdc
5 Vdc
9 Vdc
12 Vdc
15 Vdc
output current
max.
min.
100, 100 mA 10, 10 mA
56, 56 mA
6, 6 mA
42,
33,
100,
56,
42,
33,
100,
56,
42,
33,
100,
56,
42,
33,
42 mA
33 mA
100 mA
56 mA
42 mA
33 mA
100 mA
56 mA
42 mA
33 mA
100 mA
56 mA
42 mA
33 mA
4,
3,
10,
6,
4,
3,
10,
6,
5,
4,
10,
6,
4,
3,
4 mA
3 mA
10 mA
6 mA
4 mA
3 mA
10 mA
6 mA
5 mA
4 mA
10 mA
6 mA
4 mA
3 mA
efficiency
72%
75%
78%
79%
74%
76%
79%
80%
74%
75%
79%
79%
74%
76%
80%
81%
package
style
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
DIP
UL60950-1
YES
YES
YES
YES
YES
YES
YES
YES
NO
NO
NO
NO
YES
YES
YES
YES
20050
SW
112
th
Ave. Tualatin, Oregon
97062
phone
503.612.2300
fax
503.612.2382
rev.
page
date
2 of 3
09/2007
PART NUMBER:
VDSD1-DIP series
DESCRIPTION:
DC/DC converter
OUTPUT SPECIFICATIONS
item
output power
line regulation
load regulation
output voltage accuracy
temperature drift
output ripple
switching frequency
test conditions
for Vin change of 1%
10% to 100% full load
see tolerance envelope graph
@ 100% load
20 MHz bandwidth
full load, nominal input
min.
0.1
typ.
max.
1
1.2
15
0.03
75
units
W
%
%
%/°C
mVp-p
KHz
50
100
GENERAL SPECIFICATIONS
short circuit protection
<1 second
temperature rise at full load
25°C Max, 15°C typ.
cooling
free air convection
operating temperature range
-40°C to +85°C
storage temperature range
-55°C to +125°C
soldering temperature
300°C (1.5mm from case for 10 sec.)
storage humidity range
<95%
case material
plastic (UL94-V0)
safety
approved to UL60950-1 (E222736)
MTBF
>3,500,000 hrs.
burn-in
full load at +85°C, for 4 hours at no-load and 4 hours at full load.
ISOLATION SPECIFICATIONS
item
isolation voltage
insulation resistance
NOTE:
1. All specifications measured at TA=25°C, humidity <75%, nominal input voltage and rated output load unless otherwise specified.
test conditions
tested for 1 min.
test at 500 Vdc
min.
1000
1000
typ.
max
units
Vdc
M
Ω
DIMENSIONS (mm)
Side View
20.40
7.00
1
7
TYPICAL CHARACTERISTICS
2.54
2.54
14
1.00
o
+ 0.15 / -0
11 10 9 8
4.10
Bottom View
15.24
1
7
Pin Function
1
7
8
9
10
11
14
-Vin
NC
+Vout2
-Vout2
+Vout2
-Vout2
+Vin
7.62
14
11 10 9 8
10.00
Note: All Pins on a 2.54mm pitch; All Pin diameters are 0.50 mm; all dimensions in mm.
20050
SW
112
th
Ave. Tualatin, Oregon
97062
phone
503.612.2300
fax
503.612.2382
rev.
page
date
3 of 3
09/2007
PART NUMBER:
VDSD1-DIP series
DESCRIPTION:
DC/DC converter
APPLICATION NOTES:
- Input filtering
To reduce the reflected ripple current and minimize EMI,
especially when the converter input is more than 2” away from
the DC source, it is recommended to connect a low ESR
electrolytic capacitor between Vin and Gnd. The values
suggested are as shown in Table 1. If additional filtering is
required, the capacitance may be increased, or expanded to
an LC network as shown in Figure 1.
- Minimum loading
The converter needs a minimum of 10% loading to maintain
output regulation. Operation under no-load conditions will not
cause immediate damages but may reduce reliability, and
cause performance not to meet specifications.
- Regulation
With a semi-regulated design, the converter’s output voltage
varies with load current and will change proportionally to the
input voltage. If regulated output is needed, an external
regulator can be used as shown in Figure 2.
TABLE 1
Input Voltage
5V
12 V
15 V
24 V
External Input Capacitance
4.7 µF
2.2 µF
2.2 µF
1.0 µF
- Protection
The converter has minimal protection against input over-
voltage or output over-load, and may be permanently damaged
if exposed to these conditions. An input clamping device can
be used for input voltage limiting. An input fuse or an output
fuse also be used to protect against over-loading.
- Dual outputs used as a single output
The +Vout and -Vout can be used to obtain a single output
that is the sum of the two outputs. In this case, the COM pin
- Output filtering
An output capacitor is needed to meet output ripple
requirements as shown in Table 2.Output capacitance may be
increased for additional filtering, but should not exeed 10µF or
expanded to an LC network as in Figure 1.
shouldn’t be used.
- External Regulator
An external 3-terminal regulator can be connected to the
output of the converter to achieve full regulation. Make sure
the converter’s output voltage provides sufficient head room
for the regulator. An additional benefit is that the built-in
protection features in the regulator, such as OCP, OTP, etc,
will protect the converter also. In a complimentory supply, a
negative output regulator must be used to achieve the
negative regulated output.
TABLE 2
Vout
5V
9V
12 V
15 V
24 V
External Ouput Capacitance
10 µF
4.7 µF
+Vout1
2.2 µF
1 µF
0.47 µF
+Vin
-Vin
REG
DC DC
-Vout1
+Vout2
-Vout2
REG
+Vout1
-Vout1
L
+Vin
+Vout1
+Vin
C
C
-Vin
DC DC
L
C
-Vout1
+Vout2
-Vout2
DC DC
-Vin
REG
+Vout2
-Vout2
<Figure 2>
<Figure 1>
20050
SW
112
th
Ave. Tualatin, Oregon
97062
phone
503.612.2300
fax
503.612.2382
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