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Old Company Name in Catalogs and Other Documents
On April 1
st
, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas
Electronics Corporation
took over all the business of both
companies.
Therefore, although the old company name remains in this document, it is a valid
Renesas
Electronics document. We appreciate your understanding.
Renesas Electronics website: http://www.renesas.com
April 1
st
, 2010
Renesas Electronics Corporation
Issued by:
Renesas Electronics Corporation
(http://www.renesas.com)
Send any inquiries to http://www.renesas.com/inquiry.
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1.
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subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please
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Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of
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“Standard”:
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-
owned subsidiaries.
(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD78011F(A), 78012F(A), 78013F(A), 78014F(A), 78015F(A), 78016F(A), 78018F(A)
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
Compared to the
µ
PD78018F (standard model), the
µ
PD78018F(A) employs a stricter quality-assurance program.
(NEC calls this quality grade “special grade”).
The
µ
PD78018F(A) is a product in the
µ
PD78018F subseries within the 78K/0 series.
Compared with the older
µ
PD78014 subseries, this subseries operates at lower voltage and provides a fuller set
of ROM and RAM variations.
A one-time PROM model
µ
PD78P018F(A) capable of operating in the same power supply voltage as of the mask
ROM product and other development tools are also provided.
Functions are described in detail in the following User's Manual, which should be read when carring out
design work.
µ
PD78018F, 78018FY Subseries User's Manual : U10659E
78K/0 Series User’s Manual – Instruction
: U12326E
FEATURES
•
Large on-chip ROM & RAM
Item
Product Name
Program
Memory
(ROM)
8K bytes
16K bytes
24K bytes
32K bytes
40K bytes
48K bytes
60K bytes
1024 bytes
512 bytes
1024 bytes
Data Memory
Internal High-
Speed RAM
512 bytes
Internal
Expanded RAM
–
Package
Buffer RAM
32 bytes
• 64-pin plastic shrink DIP (750 mil)
• 64-pin plastic QFP (14
×
14 mm)
µ
PD78011F(A)
µ
PD78012F(A)
µ
PD78013F(A)
µ
PD78014F(A)
µ
PD78015F(A)
µ
PD78016F(A)
µ
PD78018F(A)
•
•
•
•
•
•
•
External memory expansion space: 64K bytes
Minimum instruction execution time can be varied from high-speed (0.4
µ
s) to ultra-low-speed (122
µ
s)
I/O ports: 53 (N-ch open-drain: 4)
8-bit resolution A/D converter: 8 channels
Serial interface: 2 channels
Timer: 5 channels
Supply voltage: V
DD
= 1.8 to 5.5 V
In addition to the
µ
PD78011F(A), 78012F(A), 78013F(A), 78014(A), 78015F(A), 78016F(A), and 78018F(A), this
document also describes
µ
PD78012F(A2). However, unless otherwise specified, the
µ
PD78018F(A) is treated as
the representative model throughout this document.
The information in this document is subject to change without notice.
Document No. U11921EJ2V0DS00 (2nd edition)
Date Published August 1997 N
Printed in Japan
The mark
shows major revised points.
©
1997
µ
PD78011F(A), 78012F(A), 78013F(A), 78014F(A), 78015F(A), 78016F(A), 78018F(A)
APPLICATION
Control unit of automotive, gas leak breaker, and safety devices, etc.
ORDERING INFORMATION
Part Number
Package
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
shrink DIP
QFP (14
×
shrink DIP
QFP (14
×
QFP (14
×
shrink DIP
QFP (14
×
shrink DIP
QFP (14
×
shrink DIP
QFP (14
×
shrink DIP
QFP (14
×
shrink DIP
QFP (14
×
(750 mil)
14 mm)
(750 mil)
14 mm)
14 mm)
(750 mil)
14 mm)
(750 mil)
14 mm)
(750 mil)
14 mm)
(750 mil)
14 mm)
(750 mil)
14 mm)
µ
PD78011FCW (A)-×××
µ
PD78011FGC (A)-×××-AB8
µ
PD78012FCW (A)-×××
µ
PD78012FGC (A)-×××-AB8
µ
PD78012FGC (A2)-×××-AB8
µ
PD78013FCW (A)-×××
µ
PD78013FGC (A)-×××-AB8
µ
PD78014FCW (A)-×××
µ
PD78014FGC (A)-×××-AB8
µ
PD78015FCW (A)-×××
µ
PD78015FGC (A)-×××-AB8
µ
PD78016FCW (A)-×××
µ
PD78016FGC (A)-×××-AB8
µ
PD78018FCW (A)-×××
µ
PD78018FGC (A)-×××-AB8
Remark
×××
indicates a ROM code suffix.
QUALITY GRADE
Special
Please refer to "Quality Grades on NEC Semiconductor Devices" (Document No. C11531E) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
DIFFERENCES BETWEEN STANDARD MODEL AND (A) MODELS
Product Names
Item
Package
• 64-pin plastic shrink DIP (750 mil)
• 64-pin plastic QFP (14
×
14 mm)
Special
• 64-pin plastic shrink DIP (750 mil)
• 64-pin plastic QFP (14
×
14 mm)
• 64-pin plastic LQFP (12
×
12 mm)
Quality grade
Standard
(A) Models
Standard Model
DIFFERENCES BETWEEN
µ
PD78012F(A) AND
µ
PD78012F(A2)
Product Names
Item
Supply voltage
Operating temperature
Minimum instruction
execution time
Package
V
DD
= 1.8 to 5.5 V
T
A
= –40 to +85
°C
0.4
µ
s (at 10-MHz operation)
• 64-pin plastic shrink DIP (750 mil)
• 64-pin plastic QFP (14
×
14 mm)
V
DD
= 5 V
±
10 %
T
A
= –40 to +125
°C
0.5
µ
s (at 8-MHz operation)
• 64-pin plastic QFP (14
×
14 mm)
µ
PD78012F(A)
µ
PD78012F(A2)
Remark
In addition to the above, the supply voltage and so on are different. For details, refer to
11. ELECTRICAL
SPECIFICATIONS.
2
µ
PD78011F(A), 78012F(A), 78013F(A), 78014F(A), 78015F(A), 78016F(A), 78018F(A)
78K/0 Series Expansion
The following shows the 78K/0 Series products development. Subseries name are shown inside frames.
Products in mass production
Products under development
Control
100-pin
100-pin
100-pin
100-pin
80-pin
80-pin
80-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
42/44-pin
Y subseries products are compatible with I
2
C bus.
µ
PD78075B
µ
PD78078
µ
PD78070A
µ
PD780058
µ
PD78058F
µ
PD78054
µ
PD780034
µ
PD780024
µ
PD78014H
µ
PD78018F
µ
PD78014
µ
PD780001
µ
PD78002
µ
PD78083
Inverter control
µ
PD78075BY
µ
PD78078Y
µ
PD78070AY
µ
PD780018AY
µ
PD780058Y
Note
µ
PD78058FY
µ
PD78054Y
µ
PD780034Y
µ
PD780024Y
µ
PD78018FY
µ
PD78014Y
µ
PD78002Y
EMI-noise reduced version of the
µ
PD78078
A timer was added to the
µ
PD78054 and external interface was enhanced
ROM-less version of the
µ
PD78078
Serial I/O of the
µ
PD78078 was enhanced and the function is limited.
Serial I/O of the
µ
PD78054 was enhanced and EMI-noise was reduced.
EMI-noise reduced version of the
µ
PD78054
UART and D/A converter were enhanced to the
µ
PD78014 and I/O was enhanced
A/D converter of the
µ
PD780024 was enhanced
Serial I/O of the
µ
PD78018F was added and EMI-noise was reduced.
EMI-noise reduced version of
µ
PD78018F
Low-voltage (1.8 V) operation version of the
µ
PD78014, with larger selection of ROM and RAM capacities
An A/D converter and 16-bit timer were added to the
µ
PD78002
An A/D converter was added to the
µ
PD78002
Basic subseries for control
On-chip UART, capable of operating at low voltage (1.8 V)
64-pin
64-pin
78K/0
Series
µ
PD780964
µ
PD780924
FIP
TM
drive
A/D converter of the
µ
PD780924 was enhanced
On-chip inverter control circuit and UART. EMI-noise was reduced.
100-pin
100-pin
80-pin
80-pin
µ
PD780208
µ
PD780228
µ
PD78044H
µ
PD78044F
LCD drive
The I/O and FIP C/D of the
µ
PD78044F were enhanced, Display output total: 53
The I/O and FIP C/D of the
µ
PD78044H were enhanced, Display output total: 48
An N-ch open drain was added to the
µ
PD78044F, Display output total: 34
Basic subseries for driving FIP, Display output total: 34
100-pin
100-pin
100-pin
µ
PD780308
µ
PD78064B
µ
PD78064
µ
PD780308Y
µ
PD78064Y
The SIO of the
µ
PD78064 was enhanced, and ROM, RAM capacity increased
EMI-noise reduced version of the
µ
PD78064
Basic subseries for driving LCDs, On-chip UART
IEBus
TM
supported
80-pin
80-pin
µ
PD78098B
µ
PD78098
Meter control
µ
PD780973
LV
EMI-noise reduced version of the
µ
PD78098
An IEBus controller was added to the
µ
PD78054
80-pin
On-chip automobile meter driving controller/driver
64-pin
µ
PD78P0914
On-chip PWM output, LV digital code decoder, and Hsync counter
Note
Under planning
3
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