MDT10P73
1. General Description
This EPROM-Based 8-bit micro-controller uses a fully static
CMOS technology process to achieve higher speed and
smaller size with the low power consumption and high noise
immunity. On chip memory includes 4K words of ROM, and
192 bytes of static RAM.
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-Port B<7:4> interrupt on change
-CCP1, CCP2, SCM, USAR, USAT
A/D converter module:
-5 analog inputs multiplexed into one A/D
converter
-8-bit resolution
TMR0 : 8-bit real time clock/counter
TMR1 : 16-bit real time clock/count
2. Features
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The followings are some of the features on the hardware
and software :
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Fully CMOS static design
8-bit data bus
On chip EPROM size : 4.0 K words
Internal RAM size : 234 bytes
(192 general purpose registers, 42 special
registers)
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37 single word instructions
14-bit instructions
8-level stacks
Operating voltage : 2.5 V ~ 5.5 V (PRD Disable)
4.5 V ~ 5.5 V (PRD Enable)
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Operating frequency : DC ~ 20 MHz
The most fast execution time is 200 ns under 20
MHz in all single cycle instructions except the
branch instruction
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Addressing modes include direct, indirect and
relative addressing modes
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Power-on Reset
Power edge-detector Reset
Power range-detector Reset
Sleep Mode for power saving
Capture, Compare, PWM module
Synchronous serial port with SCM
11 interrupt sources:
-External INT pin
-TMR0 timer, TMR1 timer, TMR2 timer
-A/D conversion completion
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TMR2 : 8-bit clock/counter(internal)
4 types of oscillator can be selected by
programming option:
RC－Low cost RC oscillator
LFXT－Low frequency crystal oscillator
XTAL－Standard crystal oscillator
HFXT－High frequency crystal oscillator
On-chip RC oscillator based Watchdog Timer(WDT)
22 I/O pins with their own independent direction
control
3. Applications
The application areas of this MDT10P73 range from
appliance motor control and high speed auto-motive to low
power remote transmitters/receivers, pointing devices, and
telecommunications
processors,
such
as
Remote
controller, small instruments, chargers, toy, automobile
and PC peripheral … etc.
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 1
2005/6 Ver. 1.5
MDT10P73
4. Pin Assignment
/MCLR
PA0/AIC0
PA1/AIC1
PA2/AIC2
PA3/AIC3/Vref
PA4/RTCC
PA5/SS/AIC4
V
ss
OSC1/CLKIN
OSC2/CLKOUT
PC0/T1OSO/T1CKI
PC1/T1OSI
PC2/CCP
PC3/SCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0/INT
V
dd
V
ss
PC7
PC6
PC5/SDO
PC4/SDI
5. Pin Function Description
Pin Name
PA0~PA3, PA5
RTCC/PA4
I/O
I/O
I/O
Function Description
Port A, TTL input level / Analog input channel
Real Time Clock/Counter, Schmitt Trigger input levels
Open drain output
PB0~PB7
I/O
Port B, TTL input level / PB0:External interrupt input ,
PB4~PB7:Interrupt on pin change
PC0~PC7
/MCLR
OSC1/CLKIN
OSC2/CLKOUT
I/O
I
I
O
Port C, Schmitt Trigger input levels
Master Clear, Schmitt Trigger input levels
Oscillator Input/external clock input
Oscillator Output/in RC mode， the CLKOUT pin has 1/4 frequency
of CLKIN
V
dd
V
ss
Power supply
Ground
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 2
2005/6 Ver. 1.5
MDT10P73
Address
1E
1F
20~7F
BANK1
01
05
06
07
0C
0D
0E
12
14
18
19
1F
A0~FF
TMR
CPIO A
CPIO B
CPIO C
PIEB1
PIEB2
PSTA
T2PER
SCMSTA
TXSC
BRREG
ADS1
General purpose register
ADRES
ADS0
General purpose register
Description
(1)IAR (Indirect Address Register) : R00
(2)RTCC (Real Time Counter/Counter Register) : R01
(3) PC (Program Counter) : R02,R0A
Write PC --- from PCHLAT
Write PC --- from PCHLAT
LJUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
A11
A10~A8
A7~A0
Write PC --- from ALU
LJUMP, LCALL --- from instruction word
RTWI, RET, RTFI --- from STACK
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 4
2005/6 Ver. 1.5
MDT10P73
(4) STATUS (Status register) : R03
Bit
0
1
2
3
4
5
Symbol
C
HC
Z
/PF
/TF
RBS0
Carry bit
Half Carry bit
Zero bit
Function
Power down Flag bit
WDT Timer overflow Flag bit
Register Bank Select bit :
0 : 00H --- 7FH(Bank0)
1 : 80H --- FFH(Bandk1)
7-6
——
General purpose bit
(5) MSR (Memory Bank Select Register) : R04
Memory Bank Select Register :
0 : 00~7F(Bank0)
1 : 80~FF(Bank1)
b7
b6
b5
b4
b3
b2
b1
b0
Indirect Addressing Mode
(6) PORT A : R05
PA5~PA0, I/O Register
(7) PORT B : R06
PB7~PB0, I/O Register
(8) PORT C : R07
PC7~PC0, I/O Register
(9)PCHLAT: R0A
(10) INTS (Interrupt Status Register) : R0B
Bit
0
1
2
3
Symbol
RBIF
INTF
TIF
RBIE
Function
PORT B change interrupt flag. Set when PB <7:4> inputs change
Set when INT interrupt occurs. INT interrupt flag.
Set when TMR0 overflows.
0 : disable PB change interrupt
1 : enable PB change interrupt
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 5
2005/6 Ver. 1.5
嵌入式系统
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