LAN9313/LAN9313i
Three Port 10/100
Managed Ethernet
Switch with MII
PRODUCT FEATURES
Highlights
High performance and full featured 3 port switch with
VLAN, QoS packet prioritization, Rate Limiting, IGMP
Snooping and management functions
Serial management via SPI/I
2
C or SMI
Unique Virtual PHY feature simplifies software
development by mimicking the multiple switch ports
as a single port PHY
Integrated IEEE 1588 Hardware Time Stamp Unit
Switch Management
Datasheet
— Port mirroring/monitoring/sniffing: ingress and/or egress
traffic on any ports or port pairs
— Fully compliant statistics (MIB) gathering counters
— Control registers configurable on-the-fly
Ports
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2 internal 10/100 PHYs with HP Auto-MDIX support
1 MII - PHY mode or MAC mode
Fully compliant with IEEE 802.3 standards
10BASE-T and 100BASE-TX support
Full and half duplex support
Full duplex flow control
Backpressure (forced collision) half duplex flow control
Automatic flow control based on programmable levels
Automatic 32-bit CRC generation and checking
2K Jumbo packet support
Programmable interframe gap, flow control pause value
Full transmit/receive statistics
Auto-negotiation
Automatic MDI/MDI-X
Loop-back mode
Target Applications
Cable, satellite, and IP set-top boxes
Digital televisions
Digital video recorders
VoIP/Video phone systems
Home gateways
Test/Measurement equipment
Industrial automation systems
Serial Management
— SPI/I
2
C (slave) access to all internal registers
— MIIM (MDIO) access to PHY related registers
— SMI (extended MIIM) access to all internal registers
Key Benefits
Ethernet Switch Fabric
— 32K buffer RAM
— 1K entry forwarding table
— Port based IEEE 802.1Q VLAN support (16 groups)
– Programmable IEEE 802.1Q tag insertion/removal
— IEEE 802.1d spanning tree protocol support
— QoS/CoS Packet prioritization
– 4 dynamic QoS queues per port
– Input priority determined by VLAN tag, DA lookup,
TOS, DIFFSERV or port default value
– Programmable class of service map based on input
priority
– Remapping of 802.1Q priority field on per port basis
– Programmable rate limiting at the ingress/egress
ports with random early discard, per port / priority
— IGMP v1/v2/v3 snooping for Multicast packet filtering
— IPV6 Multicast Listener Discovery snoop
— Programmable filter by MAC address
IEEE 1588 Hardware Time Stamp Unit
— Global 64-bit tunable clock
— Master or slave mode per port
— Time stamp on TX or RX of Sync and Delay_req
packets per port, Timestamp on GPIO
— 64-bit timer comparator event generation (GPIO or IRQ)
Other Features
— General Purpose Timer
— Serial EEPROM interface (I
2
C master or Microwire
TM
master) for non-managed configuration
— Programmable GPIOs/LEDs
Single 3.3V power supply
Available in Commercial & Industrial Temp. Ranges
SMSC LAN9313/LAN9313i
DATASHEET
Revision 1.2 (04-08-08)
Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
ORDER NUMBERS:
LAN9313-NU FOR 128-PIN, VTQFP LEAD-FREE ROHS COMPLIANT PACKAGE (0 TO 70°C TEMP RANGE)
LAN9313-NZW FOR 128-PIN, XVTQFP LEAD-FREE ROHS COMPLIANT PACKAGE (0 TO 70°C TEMP RANGE)
LAN9313i-NZW FOR 128-PIN, XVTQFP LEAD-FREE ROHS COMPLIANT PACKAGE (-40 TO 85°C TEMP RANGE)
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123
Copyright © 2008 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.2 (04-08-08)
2
SMSC LAN9313/LAN9313i
DATASHEET
Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Table of Contents
Chapter 1 Preface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.1
1.2
1.3
General Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Register Nomenclature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Chapter 2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.1
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1 System Clocks/Reset/PME Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2 System Interrupt Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3 Switch Fabric . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.4 Ethernet PHYs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.5 PHY Management Interface (PMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.6 SPI/I2C Slave Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.7 SMI Slave Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.8 EEPROM Controller/Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.9 1588 Time Stamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.10 GPIO/LED Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.1 MAC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.2 PHY Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.3 Management Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
19
20
20
21
21
21
21
22
22
22
22
23
23
23
23
Chapter 3 Pin Description and Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.1
Pin Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 128-VTQFP Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2 128-XVTQFP Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
26
27
28
Chapter 4 Clocking, Resets, and Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.1
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.2
Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.2.1 Chip-Level Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.2.1.1
4.2.1.2
Power-On Reset (POR) .................................................................................................................................................................................. 42
nRST Pin Reset .............................................................................................................................................................................................. 43
4.2.2
4.2.2.1
Multi-Module Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Digital Reset (DIGITAL_RST) ......................................................................................................................................................................... 43
4.2.3
4.2.3.1
4.2.3.2
4.2.3.3
Single-Module Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Port 2 PHY Reset............................................................................................................................................................................................ 44
Port 1 PHY Reset............................................................................................................................................................................................ 44
Virtual PHY Reset ........................................................................................................................................................................................... 44
4.2.4
4.2.4.1
4.2.4.2
Configuration Straps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Soft-Straps ...................................................................................................................................................................................................... 45
Hard-Straps..................................................................................................................................................................................................... 50
4.3
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
4.3.1 Port 1 & 2 PHY Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Chapter 5 System Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.1
Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2
Interrupt Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2.1 1588 Time Stamp Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2.2 Switch Fabric Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2.3 Ethernet PHY Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2.4 GPIO Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SMSC LAN9313/LAN9313i
3
52
52
54
54
55
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Revision 1.2 (04-08-08)
DATASHEET
Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
5.2.5
5.2.6
5.2.7
General Purpose Timer Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Software Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Device Ready Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Chapter 6 Switch Fabric . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
6.1
Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2
Switch Fabric CSRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2.1 Switch Fabric CSR Writes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2.2 Switch Fabric CSR Reads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2.3 Flow Control Enable Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3
10/100 Ethernet MACs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3.1 Receive MAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3.1.1
57
57
58
59
60
62
62
Receive Counters ........................................................................................................................................................................................... 63
6.3.2
6.3.2.1
Transmit MAC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Transmit Counters .......................................................................................................................................................................................... 64
6.4
Switch Engine (SWE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.4.1 MAC Address Lookup Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.4.1.1
6.4.1.2
6.4.1.3
6.4.1.4
6.4.1.5
6.4.1.6
6.4.1.7
Learning/Aging/Migration ................................................................................................................................................................................ 66
Static Entries................................................................................................................................................................................................... 66
Multicast Pruning ............................................................................................................................................................................................ 66
Address Filtering ............................................................................................................................................................................................. 66
Spanning Tree Port State Override................................................................................................................................................................. 66
MAC Destination Address Lookup Priority...................................................................................................................................................... 66
Host Access .................................................................................................................................................................................................... 66
6.4.2
6.4.3
6.4.3.1
6.4.3.2
6.4.3.3
6.4.3.4
Forwarding Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Transmit Priority Queue Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Port Default Priority......................................................................................................................................................................................... 71
IP Precedence Based Priority ......................................................................................................................................................................... 71
DIFFSERV Based Priority............................................................................................................................................................................... 71
VLAN Priority .................................................................................................................................................................................................. 71
6.4.4
6.4.5
6.4.6
6.4.6.1
VLAN Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Spanning Tree Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Ingress Flow Metering and Coloring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Ingress Flow Calculation................................................................................................................................................................................. 74
6.4.7
6.4.8
6.4.9
6.4.10
6.4.10.1
6.4.10.2
Broadcast Storm Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IPv4 IGMP / IPv6 MLD Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Mirroring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Host CPU Port Special Tagging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
76
76
77
77
Packets from the Host CPU ............................................................................................................................................................................ 77
Packets to the Host CPU ................................................................................................................................................................................ 78
6.4.11 Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
6.5
Buffer Manager (BM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
6.5.1 Packet Buffer Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
6.5.1.1
Buffer Limits and Flow Control Levels ............................................................................................................................................................ 79
6.5.2 Random Early Discard (RED). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.3 Transmit Queues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.4 Transmit Priority Queue Servicing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.5 Egress Rate Limiting (Leaky Bucket) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.6 Adding, Removing, and Changing VLAN Tags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.7 Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.6
Switch Fabric Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
79
79
79
80
80
83
83
Chapter 7 Ethernet PHYs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
7.1
Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.1.1 PHY Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.2
Port 1 & 2 PHYs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.2.1 100BASE-TX Transmit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.2.1.1
7.2.1.2
7.2.1.3
7.2.1.4
7.2.1.5
84
84
85
86
MII MAC Interface ........................................................................................................................................................................................... 86
4B/5B Encoder................................................................................................................................................................................................ 86
Scrambler and PISO ....................................................................................................................................................................................... 88
NRZI and MLT-3 Encoding ............................................................................................................................................................................. 88
100M Transmit Driver ..................................................................................................................................................................................... 88
Revision 1.2 (04-08-08)
4
SMSC LAN9313/LAN9313i
DATASHEET
Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
7.2.1.6
100M Phase Lock Loop (PLL) ........................................................................................................................................................................ 88
7.2.2
7.2.2.1
7.2.2.2
7.2.2.3
7.2.2.4
7.2.2.5
7.2.2.6
7.2.2.7
100BASE-TX Receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
A/D Converter ................................................................................................................................................................................................. 89
DSP: Equalizer, BLW Correction and Clock/Data Recovery .......................................................................................................................... 89
NRZI and MLT-3 Decoding ............................................................................................................................................................................. 90
Descrambler and SIPO ................................................................................................................................................................................... 90
5B/4B Decoding .............................................................................................................................................................................................. 90
Receiver Errors ............................................................................................................................................................................................... 90
MII MAC Interface ........................................................................................................................................................................................... 90
7.2.3
7.2.3.1
7.2.3.2
10BASE-T Transmit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
MII MAC Interface ........................................................................................................................................................................................... 91
10M TX Driver and PLL .................................................................................................................................................................................. 91
7.2.4
7.2.4.1
7.2.4.2
7.2.4.3
7.2.4.4
10BASE-T Receive. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Filter and Squelch ........................................................................................................................................................................................... 91
10M RX and PLL............................................................................................................................................................................................. 91
MII MAC Interface ........................................................................................................................................................................................... 92
Jabber Detection............................................................................................................................................................................................. 92
7.2.5
7.2.5.1
7.2.5.2
7.2.5.3
7.2.5.4
7.2.5.5
PHY Auto-negotiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
PHY Pause Flow Control ................................................................................................................................................................................ 94
Parallel Detection............................................................................................................................................................................................ 94
Restarting Auto-Negotiation............................................................................................................................................................................ 94
Disabling Auto-Negotiation ............................................................................................................................................................................. 94
Half Vs. Full-Duplex ........................................................................................................................................................................................ 95
7.2.6
7.2.7
7.2.8
7.2.8.1
HP Auto-MDIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
MII MAC Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
PHY Management Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
PHY Interrupts ................................................................................................................................................................................................ 96
7.2.9
7.2.9.1
7.2.9.2
7.2.10.1
7.2.10.2
7.2.10.3
PHY Power-Down Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
PHY General Power-Down ............................................................................................................................................................................. 97
PHY Energy Detect Power-Down ................................................................................................................................................................... 97
PHY Software Reset via RESET_CTL............................................................................................................................................................ 97
PHY Software Reset via PHY_BASIC_CTRL_x ............................................................................................................................................. 97
PHY Power-Down Reset................................................................................................................................................................................. 97
7.2.10 PHY Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
7.2.11 LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.2.12 Required Ethernet Magnetics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.3
Virtual PHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.3.1 Virtual PHY Auto-Negotiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.3.1.1
7.3.1.2
7.3.1.3
98
98
98
98
Parallel Detection............................................................................................................................................................................................ 99
Disabling Auto-Negotiation ............................................................................................................................................................................. 99
Virtual PHY Pause Flow Control ..................................................................................................................................................................... 99
7.3.2
7.3.2.1
Virtual PHY in MAC Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Full-Duplex Flow Control............................................................................................................................................................................... 100
7.3.3
7.3.3.1
7.3.3.2
Virtual PHY Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Virtual PHY Software Reset via RESET_CTL .............................................................................................................................................. 100
Virtual PHY Software Reset via VPHY_BASIC_CTRL ................................................................................................................................. 100
Chapter 8 Serial Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
8.1
Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.2
I2C/Microwire Master EEPROM Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.2.1 EEPROM Controller Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.2.2 I2C EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.2.2.1
8.2.2.2
8.2.2.3
8.2.2.4
8.2.2.5
101
101
102
103
I2C Protocol Overview .................................................................................................................................................................................. 104
I2C EEPROM Device Addressing................................................................................................................................................................. 105
I2C EEPROM Byte Read .............................................................................................................................................................................. 106
I2C EEPROM Sequential Byte Reads .......................................................................................................................................................... 106
I2C EEPROM Byte Writes ............................................................................................................................................................................ 107
8.2.3
8.2.3.1
8.2.3.2
8.2.3.3
8.2.3.4
8.2.3.5
8.2.3.6
8.2.3.7
8.2.3.8
Microwire EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Microwire Master Commands ....................................................................................................................................................................... 108
ERASE (Erase Location) .............................................................................................................................................................................. 109
ERAL (Erase All)........................................................................................................................................................................................... 110
EWDS (Erase/Write Disable) ........................................................................................................................................................................ 110
EWEN (Erase/Write Enable)......................................................................................................................................................................... 111
READ (Read Location) ................................................................................................................................................................................. 111
WRITE (Write Location) ................................................................................................................................................................................ 112
WRAL (Write All)........................................................................................................................................................................................... 112
8.2.4
8.2.4.1
8.2.4.2
8.2.4.3
8.2.4.4
EEPROM Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
EEPROM Loader Operation ......................................................................................................................................................................... 113
EEPROM Valid Flag ..................................................................................................................................................................................... 115
MAC Address................................................................................................................................................................................................ 115
Soft-Straps .................................................................................................................................................................................................... 115
SMSC LAN9313/LAN9313i
5
Revision 1.2 (04-08-08)
DATASHEET
嵌入式系统
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