®
TN8, TS8 and TYNx08 Series
8A SCR
S
A
SENSITIVE & STANDARD
Table 1: Main Features
Symbol
I
T(RMS)
V
DRM
/V
RRM
I
GT
Value
8
600 to 1000
0.2 to 15
Unit
A
V
mA
A
G
K
A
DESCRIPTION
Available either in sensitive
(TS8)
or standard
(TN8 / TYN)
gate triggering levels, the 8A SCR
series is suitable to fit all modes of control, found
in applications such as overvoltage crowbar
protection, motor control circuits in power tools
and kitchen aids, inrush current limiting circuits,
capacitive discharge ignition and voltage
regulation circuits...
Available in through-hole or surface-mount
packages, they provide an optimized performance
in a limited space area.
K A
G
K
A
G
DPAK
(TN8-B / TS8-B)
A
IPAK
(TN8-H / TS8-H)
A
K
A
G
K
A
G
TO-220AB
(TS8-T)
TO-220AB
(TYNx08RG)
Table 2: Order Codes
Part Numbers
TN805-x00B
TN805-x00B-TR
TN805-x00H
TN815-x00B
TN815-x00B-TR
TN815-x00H
TS820-x00B
TS820-x00B-TR
TS820-x00H
TS820-x00T
TYNx08RG
Marking
TN805x00
TN805x00
TN805x00
TN815x00
TN815x00
TN815x00
TS820x00
TS820x00
TS820x00
TS820x00T
TYNx08
February 2006
REV. 5
1/10
TN8, TS8 and TYNx08 Series
Table 3: Absolute Ratings
(limiting values)
Symbol
I
T(RMS)
IT
(AV)
I
TSM
I
²
t
dI/dt
I
GM
P
G(AV)
T
stg
T
j
V
RGM
Parameter
RMS on-state current (180° conduction angle)
T
c
= 110°C
Value
TS8/TN8
8
5
73
70
24.5
50
4
1
- 40 to + 150
- 40 to + 125
5
100
95
45
A
A
2S
A/µs
A
W
°C
V
TYN08
Unit
A
A
Average on-state current (180° conduction angle) T
c
= 110°C
Non repetitive surge peak on-
state current
I
²
t Value for fusing
t
p
= 8.3 ms
t
p
= 10 ms
t
p
= 10 ms
T
j
= 25°C
T
j
= 25°C
T
j
= 125°C
T
j
= 125°C
T
j
= 125°C
Critical rate of rise of on-state
current I
G
= 2 x I
GT
, t
r
≤
100 ns F = 60 Hz
Peak gate current
Average gate power dissipation
Storage junction temperature range
Operating junction temperature range
t
p
= 20 µs
Maximum peak reverse gate voltage (for
TN8
&
TYN08
only)
Tables 4: Electrical Characteristics
(T
j
= 25°C, unless otherwise specified)
■
SENSITIVE
Test Conditions
V
D
= 12 V
V
D
= V
DRM
I
RG
= 10 µA
I
T
= 50 mA
I
G
= 1 mA
I
TM
= 16 A
R
GK
= 1 kΩ
R
GK
= 1 kΩ
R
GK
= 220
Ω
T
j
= 125°C
T
j
= 25°C
T
j
= 125°C
T
j
= 125°C
T
j
= 25°C
T
j
= 125°C
tp = 380 µs
R
L
= 140
Ω
R
L
= 3.3 kΩ
R
GK
= 220
Ω
T
j
= 125°C
MAX.
MAX.
MIN.
MIN.
MAX.
MAX.
MIN.
MAX.
MAX.
MAX.
MAX.
TS820
200
0.8
0.1
8
5
6
5
1.6
0.85
46
5
1
Unit
µA
V
V
V
mA
mA
V/µs
V
V
mΩ
µA
mA
I
GT
V
GT
V
GD
V
RG
I
H
I
L
dV/dt
V
TM
V
t0
R
d
I
DRM
I
RRM
Symbol
V
D
= 65 % V
DRM
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
R
GK
= 220
Ω
2/10
TN8, TS8 and TYNx08 Series
■
STANDARD
Test Conditions
MIN.
V
D
= 12 V
V
D
= V
DRM
I
T
= 100 mA
I
G
= 1.2 I
GT
V
D
= 67 % V
DRM
I
TM
= 16 A
Gate open T
j
=125°C
T
j
= 25°C
T
j
= 125°C
T
j
= 125°C
T
j
= 25°C
T
j
= 125°C
R
L
= 33
Ω
R
L
= 3.3 kΩ
Gate open
T
j
= 125°C
MAX.
MAX.
MIN.
MAX.
MAX.
MIN.
MAX.
MAX.
MAX.
MAX.
25
30
50
TN805
0.5
5
TN815 TYNx08
2
15
1.3
0.2
40
50
150
1.6
0.85
46
5
2
30
70
150
2
15
Unit
mA
V
V
mA
mA
V/µs
V
V
mΩ
µA
mA
Symbol
I
GT
V
GT
V
GD
I
H
I
L
dV/dt
V
TM
V
t0
R
d
I
DRM
I
RRM
t
p
= 380 µs
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
Table 6: Thermal resistance
Symbol
R
th(j-c)
Junction to case (D.C.)
S = 0.5 cm
²
R
th(j-a)
Junction to ambient (D.C.)
DPAK
IPAK
TO-220AB
S = Copper surface under tab.
Parameter
Value
20
70
100
60
Unit
°C/W
°C/W
Figure 1: Maximum average power dissipation
versus average on-state current
P(W)
8
7
6
5
4
3
360°
α
= 180°
Figure 2: Average and D.C. on-state current
versus case temperature
I
T(AV)
(A)
10.0
D.C.
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
α
= 180°
2
1
0
0
1
2
3
4
5
6
I
T(AV)
(A)
α
1.0
0.0
0
25
50
T
case
(°C)
75
100
125
3/10
TN8, TS8 and TYNx08 Series
Figure 3: Average and D.C. on-state current
versus ambient temperature (device mounted
on FR4 with recommended pad layout) (DPAK)
I
T(AV)
(A)
2.0
1.8
1.6
D.C.
Figure 4: Relative variation of thermal
impedance junction to case versus pulse
duration
K=[Z
th(j-c)
/R
th(j-c)
]
1.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
α
= 180°
0.5
0.2
T
amb
(°C)
t
p
(s)
0.1
1E-3
1E-2
1E-1
1E+0
Figure 5: Relative variation of thermal
impedance junction to ambient versus pulse
duration (recommended pad layout, FR4 PC
board for DPAK)
K=[Z
th(j-a)
/R
th(j-a)
]
1.00
Figure 6: Relative variation of gate trigger
current and holding current versus junction
temperature for TS8 series
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.0
1.8
I
GT
1.6
1.4
DPAK
1.2
0.10
TO-220AB / IPAK
1.0
0.8
0.6
0.4
I
H
& I
L
R
GK
= 1k
Ω
t
p
(s)
0.01
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
0.2
0.0
-40
-20
0
20
T
j
(°C)
40
60
80
100
120
140
Figure 7: Relative variation of gate trigger
current and holding current versus junction
temperature for TN8 & TYN08 series
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-40
-20
0
20
40
60
80
100
120
140
I
H
& I
L
I
GT
Figure 8: Relative variation of holding current
versus gate-cathode resistance (typical
values) for TS8 series
I
H
[R
GK
] / I
H
[R
GK
=1k
Ω
]
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
T
j
= 25°C
T
j
(°C)
1.0
0.5
0.0
1E-2
1E-1
R
GK
(k
Ω
)
1E+0
1E+1
4/10
TN8, TS8 and TYNx08 Series
Figure 9: Relative variation of dV/dt immunity
versus gate-cathode resistance (typical
values) for TS8 series
dV/dt[R
GK
] / dV/dt[R
GK
=220
Ω
]
10.00
T
j
= 125°C
V
D
= 0.67 x V
DRM
Figure 10: Relative variation of dV/dt immunity
versus gate-cathode capacitance (typical
values) for TS8 series
dV/dt[C
GK
] / dV/dt[R
GK
=220
Ω
]
15.0
V
D
= 0.67 x V
DRM
T
j
= 125°C
R
GK
= 220
Ω
12.5
1.00
10.0
7.5
0.10
5.0
2.5
R
GK
(k
Ω
)
0.01
0
200
400
600
800
1000
1200
1400
1600
1800
2000
C
GK
(nF)
0.0
0
20
40
60
80
100
120
140
160
180
200
220
Figure 11: Surge peak on-state current versus
number of cycles
Figure 12: Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10 ms, and corresponding values of I²t
I
TSM
(A), I t (A s)
1000
T
j
initial = 25°C
2
2
I
TSM
(A)
100
90
80
70
60
50
40
TN8 / TS8
Non repetitive
T
j
initial=25°C
TYN08
t
p
=10ms
One cycle
I
TSM
TYN08
dI/dt limitation
TN8 / TS8
100
TYN08
30
20
10
0
1
Repetitive
T
C
=110°C
I
2
t
TN8 / TS8
Number of cycles
10
10
100
1000
t
p
(ms)
0.01
0.10
1.00
10.00
Figure 13: On-state characteristics (maximum
values)
Figure 14: Thermal resistance junction to
ambient versus copper surface under tab
(epoxy printed circuit board FR4, copper
thickness: 35µm) (DPAK)
R
th(j-a)
(°C/W)
100
I
TM
(A)
50.0
T
j
max.:
V
t0
=0.85V
R
d
=46m
Ω
80
10.0
T
j
=max
60
1.0
T
j
=25°C
40
20
V
TM
(V)
0.1
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
0
2
4
6
8
S(cm²)
10
12
14
16
18
20
5/10
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