SG1524/SG2524/SG3524
Regulating Pulse Width Modulator
Description
This monolithic integrated circuit contains all the control
circuitry for a regulating power supply inverter or switching
regulator. Included in a 16-pin dual-in-line package is the
voltage reference, error amplifier, oscillator, pulse width
modulator, pulse steering flip-flop, dual alternating output
switches and current limiting and shut-down circuitry. This
device can be used for switching regulators of either
polarity, transformer coupled DC to DC converters,
transformerless voltage doublers and polarity converters, as
well as other power applications. The SG1524 is specified
for operation over the full military ambient temperature
range of -55°C to +125°C, the SG2524 for -25°C to +85°C,
and the SG3524 is designed for commercial applications of
0°C to +70°C.
Features
8V to 40V Operation
5V Reference
Reference Line and Load Regulation of 0.4%
100Hz to 300kHz Oscillator Range
Excellent External Sync Capability
Dual 50mA Output Transistors
Current Limit Circuitry
Complete PWM Power Control Circuitry
Single Ended or Push-Pull Outputs
Total Supply Current less than 10mA
High Reliability Features
Following are the high reliability features of SG1524:
Available to MIL-STD-883, ¶ 1.2.1
MIL-M38510/12601BEA SG1524J-JAN
MSC-AMS Level “S” Processing Available
Available to DSCC - Standard Microcircuit
Drawing (SMD)
Block Diagram
Figure 1 ·
Block Diagram
February
2015 Rev. 1.2
www.microsemi.com
© 2015 Microsemi Corporation
1
Absolute Maximum Ratings
(Note 1)
Input Voltage (+V
IN
) ............................................................. 42V
Collector Voltage ................................................................ 40V
Logic Inputs ........................................................... -0.3V to 5.5V
Current Limit Sense Inputs ................................... -0.3V to 0.3V
Output Current (each transistor) .................................... 100mA
Reference Load Current .................................................. 50mA
Note
1: Values beyond which damage may occur.
Oscillator Charging Current ................................................ 5mA
Operating Junction Temperature
Hermetic (J, L Packages) ................................................. 150°C
Plastic (N, D Packages) ................................................... 150°C
Storage Temperature Range ..............................-65°C to 150°C
Lead Temperature (Soldering, 10 seconds).....................300°C
Pb-free / RoHS Peak Package Solder Reflow Temp (40 sec. max.
exposure)... 260°C (+0, -5)
Thermal Data
J
Package:
Thermal Resistance-Junction to Case,
θ
JC
............... 30°C/W
Thermal Resistance-Junction to Ambient,
θ
JA
........... 80°C/W
N Package:
Thermal Resistance-Junction to Case,
θ
JC
............... 40°C/W
Thermal Resistance-Junction to Ambient,
θ
JA
........... 65°C/W
D Package:
Thermal Resistance-Junction to Case,
θ
JC
............... 50°C/W
Thermal Resistance-Junction to Ambient,
θ
JA
......... 120°C/W
L Package:
Thermal Resistance-Junction to Case,
θ
JC
........... .... 35°C/W
Thermal Resistance-Junction to Ambient,
θ
JA
......... 120°C/W
Note
A. Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
Note B.
The above numbers for
θ
JC
are maximums for the limiting
thermal resistance of the package in a standard mounting
configuration. The
θ
JA
numbers are meant to be
guidelines for the thermal performance of the device/pc-
board system. All of the above assume no ambient
airflow.
Recommended Operating Conditions
(Note 2)
Input Voltage (+V
IN
) ................................................... 8V to 40V
Collector Voltage ....................................................... 0V to 40V
Error Amp Common Mode Range ..........................1.8V to 3.4V
Current Limit Sense Common Mode Range ........ -0.3V to 0.3V
Output Current (each transistor) ............................... 0 to 50mA
Reference Load Current ........................................... 0 to 20mA
Oscillator Charging Current .................................. 30µA to 2mA
Oscillator Frequency Range ......................... 100Hz to 300kHz
Oscillator Timing Resistor (R
T
) ........................ 1.8kΩ to 100kΩ
Oscillator Timing Capacitor (C
T
) ............................ 1nF to 1.0µF
Operating Ambient Temperature Range
SG1524 ......................................................... -55°C to 125°C
SG2524 ........................................................... -25°C to 85°C
SG3524 ............................................................... 0°C to 70°C
Note 2: Range over which the device is functional and parameter limits are guaranteed.
Electrical Characteristics
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1524 with -55°C
≤
T
A
≤
125°C, SG2524 with
-25°C
≤
T
A
≤
85°C, SG3524 with 0°C
≤
T
A
≤
70°C, and +V
IN
= 20V. Low duty cycle pulse testing techniques are used which maintains junction and
case temperatures equal to the ambient temperature.)
Parameter
Reference Section
(Note 3)
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
(Note 7)
Total
Output Voltage Range
(Note 7)
Short Circuit Current
Note 3. I
L
= 0mA
Test Conditions
T
J
= 25°C
V
IN
= 8V to 40V
I
L
= 0 to 20mA
Over Operating Temperature Range
Over Line, Load and Temperature
V
REF
= 0V
SG1524/SG2524
SG3524
Units
Min. Typ. Max. Min. Typ. Max.
4.80 5.00 5.20 4.60 5.00 5.40
20
30
50
50
50
50
5.20 4.60
5.40
4.80
25
50 150 25
50 150
V
mV
mV
mV
V
mA
2
Electrical Characteristics
(Continued)
Parameter
Oscillator Section
(Note 4)
Initial Accuracy
Voltage Stability
Maximum Frequency
Sawtooth Peak Voltage
Sawtooth Valley Voltage
Clock Amplitude
Clock Pulse Width
Error Amplifier Section
(Note 5)
Input Offset Voltage
Input Bias Current
Input Offset Current
DC Open Loop Gain
Output Low Level
Output High Level
Common Mode Rejection
Supply Voltage Rejection
Gain-Bandwidth Product
(Note 7)
P.W.M. Comparator
(Note 4)
Minimum Duty Cycle
Maximum Duty Cycle
Test Conditions
T
J
= 25°C
MIN
≤
T
J
≤
MAX
V
IN
= 8V to 40V
R
T
= 2kΩ, C
T
= 1nF
V
IN
= 40V
V
IN
= 8V
SG3524
SG1524/SG2524
Units
Min. Typ. Max. Min. Typ. Max.
36
34
200
3
0.6
3.2
0.3
40
0.1
400
1
44
46
1
3.8
1.2
1.5
0.5
1
72
3.8
70
55
1
0.2
4.2
0.5
3.8
5
10
1
60
0.2
4.2
0.5
36
34
200
3
0.6
3.2
0.3
40
0.1
400
1
44
46
1
3.8
1.2
1.5
2
1
10
10
2
kHz
kHz
%
kHz
V
V
V
µs
mV
µA
µA
dB
V
V
dB
dB
MHz
%
%
mV
µA
V
V
µA
V
V
µs
µs
mA
R
S
≤
2kΩ
R
L
≥10MΩ,
T
J
= 25°C
V
PIN 1
- V
PIN 2
≥
150mV
V
PIN 2
- V
PIN 1
≥150mV
V
CM
= 1.8V to 3.4V
V
IN
= 8V to 40V
T
J
= 25°C
V
COMP
= 0.5V
V
COMP
= 3.6V
2
0
1
2
0
45
190
49
200
210
200
1.2
1.8
50
2
45
180
49
200
220
200
1.2
1.8
50
2
Current Limit Amplifier Section
(Note 6)
T
J
= 25°C
Sense Voltage
Input Bias Current
Shutdown Section
Threshold Voltage
T
J
= 25°C
MIN
≤
T
J
≤
MAX
Output Section
(each transistor)
Collector Leakage Current
V
CE
= 40V
Collector Saturation Voltage
I
C
= 50mA
Emitter Output Voltage
I
E
= 50mA
R
C
= 2kΩ
Collector Voltage Rise Time
Collector Voltage Fall Time
R
C
= 2kΩ
Power Consumption
Standby Current
V
IN
= 40V
Note 4.
Note 5.
Note 6.
Note 7.
0.5
0.2
0.8
0.5
0.2
0.8
17
0.4
0.2
7
10
17
0.4
0.2
7
10
F
OSC
= 40kHz (R
T
= 2.9kΩ, C
T
= .01µF)
V
CM
= 2.5V
V
CM
= 0V
These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production.
3
Application
Notes
OSCILLATOR
The oscillator in the SG1524 uses an external resistor R
T
to
establish a constant charging current into an external capacitor
C
T
. While this uses more current than a series-connected RC, it
provides a linear ramp voltage at C
T
which is used as a time-
dependent reference for the PWM comparator. The charging
current is equal to 3.6V/R
T
, and should be restricted to between
30µA and 2mA. The equivalent range for R
T
is 100k to 1.8k.
The range of values for C
T
also has limits, as the discharge time
of C
T
determines the pulse width of the oscillator output pulse.
The pulse is used (among other things) as a blanking pulse to
both outputs to insure that there is no possibility of having both
outputs on simultaneously during transitions. This output
deadtime relationship is shown in Figure 2. A pulse width below
0.35 microseconds may cause failure of the internal flip-flop to
toggle. This restricts the minimum value of C
T
to 1000pF. (Note:
Although the oscillator output is a convenient oscilloscope sync
input, the probe capacitance will increase the pulse width and
decrease the oscillator frequency slightly.) Obviously, the upper
limit to the pulse width is determined by the modulation range
required in the power supply at the chosen switching frequency.
Practical values of C
T
fall between 1000pF and 0.1µF, although
successful 120 Hz oscillators have been implemented with
values up to 5µF and a series surge limit resistor of 100 ohms.
The oscillator frequency is approximately 1/R
T
•C
T
; where R is in
ohms, C is in microfarads, and the frequency is in Megahertz.
For greater accuracy, the chart in Figure 3 may be used for a
wide range of operating frequencies.
Note that for buck regulator topologies, the two outputs can be
wire-ORed for an effective 0-90% duty cycle range. With this
connection, the output frequency is the same as the oscillator
frequency. For push-pull applications, the outputs are used
separately; the flip-flop limits the duty cycle range at each output
to 0-45%, and the effective switching frequency at the trans-
former is 1/2 the oscillator frequency.
If it is desired to synchronize the SG1524 to an external clock, a
positive pulse may be applied to the clock pin. The oscillator
should be programmed with R
T
and C
T
values that cause it to
free-run at 90% of the external sync frequency. A sync pulse
with a maximum logic 0 of +0.3 volts and a minimum logic 1 of
+2.4 volts applied to Pin 3 will lock the oscillator to the external
source. The minimum sync pulsewidth should be 200
nanoseconds, and the maximum is determined by the required
deadtime. The clock pin should never be driven more negative
than -0.3 volts, nor more positive than +5.0 volts. The
nominal resistance to ground is 3.2k at the clock pin, ±25%
over temperature.
If two or more SG1524's must be synchronized together, program
one master unit with R
T
and C
T
for the desired frequency.
Leave the R
T
pins on the slaves open, connect the C
T
pins to
the C
T
of the master, and connect the clock pins to the clock pin
of the master. Since C
T
is a high-impedance node, this sync
technique works best when all devices are close together.
20
10
5
2
1
0.5
0.2
.001
.002
.005
.01
.02
.05
0.1
100k
50k
20k
10k
5k
2k
1k
500
1k
2k
5k
10k
20k
50k 100k
200k 500k
Figure 2 · Output Stage Deadtime
vs.
C
T
Figure 3 · Oscillator Frequency
vs.
R
T
and C
T
4
Application
Notes
(Continued)
CURRENT LIMITING
The current limiting circuitry of the SG1524 is shown in Figure
4.
By matching the base-emitter voltages of Q1 and Q2, and
assuming a negligible voltage drop across R1:
C.L. Threshold = V
BE
(Q1) + I
1
• R
2
- V
BE
(Q2) = I
1
• R
2
~ 200 mV
Although this circuit provides a relatively small threshold with a
negligible temperature coefficient, there are some limitations to
its use because of its simplicity.
The most important of these is the limited common-mode voltage
range: ±0.3 volts around ground. This requires sensing in the
ground or return line of the power supply. Also precautions
should be taken to not turn on the parasitic substrate diode of the
integrated circuit, even under transient conditions. A Schottky
clamp diode at Pin 5 may be required in some configurations to
achieve this.
A second factor to consider is that the response time is
relatively slow. The current limit amplifier is internally
compensated by R
1
, C
1
, and
Q1, resulting in a roll-off pole at
approximately 300 Hz. A third factor to consider is the bias
current of the C.L.
sense
pins. A constant current of
approximately 150µA flows out of Pin 4, and a variable current
with a range of 0-150µA flows out of Pin
5. As a result, the
equivalent source impedance seen by the current sense pins
should be less than 50 ohms to keep the threshold error less
than 5%.
Since the gain of this circuit is relatively low (42 dB), there is a
transition region as the current limit amplifier takes over pulse
width control from the error amplifier. For testing purposes,
threshold is defined as the input voltage required to get 25% duty
cycle (+2 volts at the error amplifier output) with the error amplifier
signaling maximum duty cycle.
APPLICATION NOTE: If the current limit function is not used on
the SG1524, the common-mode voltage range restriction re
-
quires both current sense pins to be grounded.
Figure 4 · Current Limiting Circuitry of the SG1524
5k
5k
5k
5k
5k
5k
1k
1k
5k
3k
2k
2k
5k
1k
1k
20k
50k
In this conventional single-ended regulator circuit, the two out-
puts of the SG1524 are connected in parallel for effective 0 - 90%
duty-cycle modulation. The use of an output inductor requires
and R-C phase compensation network for loop stability.
Push-pull outputs are used in this transformer-coupled DC-DC
regulating converter. Note that the oscillator must be set at twice
the desired output frequency as the SG1524's internal flip-flop
divides the frequency by 2 as it switches the PWM signal from
one output to the other. Current limiting is done here in the
primary so that the pulse width will be reduced should transformer
saturation occur.
5
FPGA/CPLD
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