SERIAL PRESENCE DETECT
KMMR18R84(6/8/C/G)AC1
RAMBUS MODULE
SPD Specification
For 144M RDRAM
(2nd Gen.)
based RIMM
REV. 1.03
February 2000
Revision History
Revision 1.0 (June
′99)
It is based on the RAMBUS SPD Specification 1.0 version.
Revision 1.01 (Oct.
′99)
Byte 53 : Add the plate temperature value, Tplate to 92°C.
Byte 54 ~ 60 : Add the current values for 356, 300MHz or 266MHz operation.
Byte 63 : Correct the checksum for bytes 0 ~ 62.
Byte 115 : Clear hexa value becase it is not used tCDLY=4 when CDLY0 = 2 & CDLY1= 0.
Byte 127 : Correct the checksum for bytes 99 ~ 126.
Revision 1.03 (Feb.
′00)
The Only difference from 1.02ver is to keep the previous OLD Part Number System.
Byte 9 : Add values(bit 7 = 0; S3 compatible) to ensure S3 resume compatibility.
Byte 53 : Add the values(bit 6 = 0; Non-Compliant thermal sensor) for proper thermal sensor trip operation.
-1-
REV. 1.03 Feb. 2000
SERIAL PRESENCE DETECT
KMMR18R84(6/8)AC1-RK8/RK7/RG6
• Feature : Single Sided Module & 1,250 mil height
• Composition : 8Mx18 *4(6/8)pcs
• Used component type & part number
1
Normal Package (KM418RD8AC-RK80/RK70/RG60)
KMMR18R84(6/8/C/G)AC1
RAMBUS MODULE
KMMR18R8C(G)AC1-RK8/RK7/RG6
• Feature : Double Sided Module & 1,250 mil height
• Composition : 8Mx18 *12(16)pcs
• Used component type & part number
1
Normal Package (KM418RD8AC-RK80/RK70/RG60)
2
Mirrored Package (KM418RD8AD-RK80/RK70/RG60)
• # of banks in component : 2*16 banks (Doubled with Split Banks)
• # of banks in component : 2*16 banks (Doubled with Split Banks)
• Refresh : 16K/32ms
• Refresh : 16K/32ms
•
Contents ;
Byte #
(Dec)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
Described Function
SPD Revision Level
Total Number of Bytes in the SPD
Device Type
Module Type
Row Address Bits[3:0], Column Address Bits[3:0]
Bank Address Bits and Type
Refresh Bank Bits
Refesh Period(=t
REF
)
Protocol Version
Misc. Device Configuration Field
Minimum Precharge to RAS time(=t
RP-R,Min
)
Minimum RAS to Precharge time(=t
RAS-R
,
Min
)
Minimum RAS to CAS time(=t
RCD-R,Min
)
Minimum RAS to RAS time(=t
RR-R,Min
)
Minimum Precharge to Precharge time(=t
PP-R,Min
)
Min t
CYCLE
for Range A
Max t
CYCLE
for Range A
t
CDLY
Range for Range A
t
CLS
and t
CAS
Range for Range A
Min t
CYCLE
for Range B
Max t
CYCLE
for Range B
t
CDLY
Range for Range B
t
CLS
and t
CAS
Range for Range B
Min t
CYCLE
for Range C
Max t
CYCLE
for Range C
t
CDLY
Range for Range C
t
CLS
and t
CAS
Range for Range C
Min t
CYCLE
for Range D
Max t
CYCLE
for Range D
t
CDLY
Range for Range D
t
CLS
and t
CAS
Range for Range D
Power Down Exit Max.time, Phase A(=t
PDNXA,Max
)
Power Down Exit Max.time, Phase B(=t
PDNXB,Max
)
Nap Exit Max.time, Phase A(=t
NAPXA,Max
)
Nap Exit Max.time, Phase B(=t
NAPXB,Max
)
f
IMIN
[11:8]
f
IMAX
[11:8]
f
IMIN
[7:0]
f
IMAX
[7:0]
Reserved
Option
Field
Width
8
8
8
8
4,4
8
3
8
8
8
5
6
5
5
5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
4
4
8
8
-
Units
K8
LUT
LUT
LUT
LUT
bits
LUT
bits
ms
LUT
n/a
1/f
RAS
1/f
RAS
1/f
RAS
1/f
RAS
1/f
RAS
128ps
128ps
t
CYCLE
t
CYCLE
128ps
128ps
t
CYCLE
t
CYCLE
128ps
128ps
t
CYCLE
t
CYCLE
128ps
128ps
t
CYCLE
t
CYCLE
us
64t
CYCL
ns
ns
MHz
MHz
MHz
-
261MHz
400MHz
261MHz
400MHz
Supported Function
K7
SPD Revision 1.0
256 Bytes
Direct RDRAM
RIMM Module
9 bits, 6 bits
2*16 banks
32 Refresh Bank Sets
32ms
Protocol Version 1
DQS=1.5
,
no -LP, S28, S3
8cycles
20cycles
10cycles
8cycles
8cycles
2.50ns
3.83ns
5t
CYCLE
~ 9t
CYCLE
8cycles
20cycles
8cycles
8cycles
8cycles
2.80ns
3.83ns
5t
CYCLE
~ 9t
CYCLE
8cycles
20cycles
8cycles
8cycles
8cycles
3.33ns
3.83ns
5t
CYCLE
~ 9t
CYCLE
08h
14h
0Ah
08h
08h
13h
1Eh
59h
G6
K8
Hex Value
K7
02h
08h
01h
01h
96h
C5h
05h
20h
02h
05h
08h
14h
08h
08h
08h
15h
1Eh
59h
AAh
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
04h
8Dh
32h
28h
261MHz
300MHz
261MHz
300MHz
11h
05h
90h
11h
05h
65h
00h
11h
05h
2Ch
2
2
2
2
2
2
2
2
2
2
2
2
08h
14h
08h
08h
08h
1Ah
1Eh
59h
1
3
1
G6
1
1
1
1
Note
2t
CYCLE
for t
CLS
& t
CAS
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
4us
9000t
CYCLE
50ns
40ns
261MHz
357MHz
261MHz
357MHz
-
-2-
REV. 1.03 Feb. 2000
SERIAL PRESENCE DETECT
Byte #
(Dec)
39
40
41
42
43
44
45
46
47~49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65~71
72
73
74
75
76
77
78
79
80
81
82
Described Function
Option
Field
Width
8
8
8
8
8
4,4
4,4
4,4
-
4
8
1,1,6
1,1,6
8
8
8
8
8
8
8
-
-
8
8
56
8
8
8
8
8
8
8
8
8
8
4d
6d
8d
12d
16d
83
84
85
86
87
88
89
90
91
Module Part Number(Component Revision)
Module Part Number(Package Type)
Module Part Number(PCB Revision)
Module Part Number(Hyphen)
Module Part Number(Power & Refresh)
Module Part Number(t
RAC
)
Module Part Number(I/O Interface)
Module Part Number(RFU)
Module Manufacturer Revision Code (PCB)
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Units
K8
ms
ms
t
CYCLE
us
us
t
CYCLE
t
CYCLE
t
CYCLE
-
MHz
MHz
°C
°C
1mA
2mA
8mA
1mA
2mA
8mA
128uA
-
-
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
R
K
8
0,0,100°C
1,0, 92°C
105mA
165mA
625mA
80mA
135mA
450mA
4.0mA
400MHz
KMMR18R84(6/8/C/G)AC1
RAMBUS MODULE
Supported Function
K7
100ms
100ms
150t
CYCLE
64us
10us
6t
CYCLE,
6t
CYCLE
5t
CYCLE,
5t
CYCLE
5t
CYCLE,
13t
CYCLE
-
357MHz
0,0,100°C
1,0,92°C
100mA
155mA
580mA
80mA
135mA
450mA
4.0mA
-
-
-
Samsung
Samsung
Onyang Korea
K
M
M
R
1
8
R
Blank
8
4
6
8
C
G
A
C
1
- (Hyphen)
R
K
7
-
1
R
G
6
52h
4Bh
38h
92h
300MHz
0,0,100°C
1,0,92°C
90mA
140mA
500mA
80mA
135mA
450mA
4.0mA
01h
90h
24h
9Ch
69h
52h
4Eh
50h
43h
38h
1Fh
G6
K8
Hex Value
K7
64h
64h
96h
40h
0Ah
66h
55h
5Dh
00h
01h
65h
24h
9Ch
64h
4Dh
48h
50h
43h
38h
1Fh
00h
00h
2Ch
CEh
00h
01h
4Bh
4Dh
4Dh
52h
31h
38h
52h
20h
38h
34h
36h
38h
43h
47h
41h
43h
31h
2Dh
52h
4Bh
37h
00h
31h
52h
47h
36h
A4h
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
01h
2Ch
24h
9Ch
5Ah
46h
3Eh
50h
43h
38h
1Fh
G6
Note
Max. time between Current Control(=t
CCTRL,Max
)
Max. time between Temp. Calibration(=t
TEMP,Max
)
Min. time between Temp. Calibration Enable
and Command(=t
TCEN,Min
)
Maximum RAS to Precharge time(=t
RAS-R,Max
)
Maximum time that a Device can stay in Nap
Mode(=t
NLIMIT,Max
)
ACTREFPT[3:0], PCHREFPT[3:0]
CPCHREFPT_DC[3:0], RDREFPT_DC[3:0]
RETREFPT_DC[3:0], WRREFPT_DC[3:0]
Reserved
f
RAS
[11:8]
f
RAS
[7:0]
PMAX,HI, PMAX,LO, Tj
HeatSpreader, thermal sensor, Tplate
PSTBY,HI
PACTI,HI
PACTRW,HI
PSTBY,LO
PACTI,LO
PACTRW,LO
PNAP
PRESA (Reserved for a future thermal parameter)
PRESB (Reserved for a future thermal parameter)
Checksum for bytes 0 ~ 62
Module Manufacturer ID Code
...... Module Manufacturer ID Code
Module Manufacturer Location
Module Part Number(Samsung memory)
Module Part Number(Samsung memory)
Module Part Number(Memory module)
Module Part Number(Module type)
Module Part Number(Data Bits)
...... Module Part Number(Data Bits)
Module Part Number(Memory Type)
Module Part Number(Module Density)
...... Module Part Number(Module Density)
Module Part Number(# of component )
-3-
REV. 1.03 Feb. 2000
SERIAL PRESENCE DETECT
Byte #
(Dec)
92
93
94
95~98
99
Described Function
...... Component Manufacturer Revision Code
Module Manufacturing Year
Module Manufacturing Week
Module Serial Number
Number of Devices on Module
4d
6d
8d
12d
16d
100
101
Module Data Width
Devices Enables
4d
6d
8d
12d
16d
102
...... Devices Enables
4d
6d
8d
12d
16d
103~104 ...... Devices Enables
105
106
114
115
116
117
118
119
120
121
122
123
124
125
126
127
Module Vdd[3:0],
Module Voltage Interface Level[3:0]
Module Vdd Tolerance
CDLY0/1 for tCDLY=3
CDLY0/1 for tCDLY=4
CDLY0/1 for tCDLY=5
CDLY0/1 for tCDLY=6
CDLY0/1 for tCDLY=7
CDLY0/1 for tCDLY=8
CDLY0/1 for tCDLY=9
CDLY0/1 for tCDLY=10
CDLY0/1 for tCDLY=11
CDLY0/1 for tCDLY=12
CDLY0/1 for tCDLY=13
CDLY0/1 for tCDLY=14
CDLY0/1 for tCDLY=15
Checksum for Bytes 99 ~ 126
4d
6d
8d
12d
16d
128 +
Open for Customer Use
Option
Field
Width
8
8
8
32
6
6
6
6
6
8
8
8
8
8
8
8
8
8
8
8
16
4,4
8
56
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
-
Units
K8
n/a
n/a
n/a
n/a
devices
devices
devices
devices
devices
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
LUT
LUT
-
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
t
CYCLE
n/a
n/a
n/a
n/a
n/a
-
KMMR18R84(6/8/C/G)AC1
RAMBUS MODULE
Supported Function
K7
A (A die)
-
-
-
4
6
8
12
16
18bits
All 4 devices are enabled
All 6 devices are enabled
All 8 devices are enabled
All 12 devices are enabled
All 16 devices are enabled
All 4 devices are enabled
All 6 devices are enabled
All 8 devices are enabled
All 12 devices are enabled
All 16 devices are enabled
-
2.5V, 1.8V Vterm
5% DC, 2% AC
-
-
-
3/0
3/1
3/2
4/2
5/2
-
-
-
-
-
-
-
-
-
-
-
-
G6
K8
Hex Value
K7
41h
-
-
-
04h
06h
08h
0Ch
10h
12h
0Fh
3Fh
FFh
FFh
FFh
00h
00h
00h
0Fh
FFh
00h
10h
52h
00h
00h
00h
30h
31h
32h
42h
52h
00h
00h
00h
00h
00h
00h
AEh
E0h
A2h
B5h
A9h
Undefined
3
3
1
1
G6
3
3, 4
3, 4
3, 5
Note
107~113 Reserved
<Notes>
1. Please refer to Look-Up Table (LUT) in the Direct Rambus
TM
SPD specification 1.0
2. It is reserved to future use (RFU).
3. Unit is not available ( n/a).
4. These bytes are programmed by code of Date Week & Date Year with binary format.
5. These bytes are programmed by Samsung’ own Module Assembly Serial # system. All modules may have unique serial #.
s
-4-
REV. 1.03 Feb. 2000
微控制器 MCU
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