EW
N
Issue 3, 06 October 2006
Radiometrix
Hartcran House, 231 Kenton Lane, Harrow, HA3 8RP, England
Tel: +44 (0) 20 8909 9595, Fax: +44 (0) 20 8909 2233
TDL2A
UHF Multi Channel Transparent Data Link Transceiver
The TDL2A is a 9600baud half-duplex multi
channel OEM radio modem in BiM2
footprint, operating on European 433MHz
ISM band. TLD2A acts as a transparent
serial cable to attached host. TDL2A is an
intermediate level OEM radio modem which
is in between a raw FM radio module like
BiM2 and a sophisticated OEM radio
modem like SPM2. It takes care of
preamble, synchronisation, bit balancing
and error checking along with automatic
noise squelching.
Figure 1: TDL2A-433-9 radio modem
The TDL2A provides a half duplex link. Provided no two devices attempt to transmit simultaneously no
further restrictions on data transmission need be made, as all transmit timing, valid data identification
and datastream buffering is conducted by the unit. Synchronisation and framing words in the packet
prevent the receiver outputting garbage in the absence of wanted RF signal or presence of interference.
For multiple radio systems (polled networks) a TDL2A can be set to 1 of 8 unique addresses. As well as
having unique addresses, the TDL2A allows operation on one of 5 pre-set frequencies in the 433MHz
band. These frequencies are non-overlapping and simultaneous operation of TDL2As in the same area
on different channels will be possible. Units are supplied on 433.925MHz (Ch0) as default.
Features
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Conforms to EN 300 220-3 and EN 301 489-3
High quality, stable crystal reference
Low noise synthesiser / VCO
SAW front-end filter
Multi-stage ceramic IF filtering
Single conversion superhet
Serial modem baud rate at 9600bps (half-duplex)
Addressable point-to-point
5 serial select wideband channels
Available as TDL2T transmitter and TDL2R receiver for one way communication
Applications
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PDAs, organisers & laptops
Handheld / portable terminals
EPOS equipment, barcode scanners
In-building environmental monitoring and control
Remote data acquisition system, data logging
Fleet management, vehicle data acquisition
Technical Summary
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Operating frequency: 433.925MHz (default)
Modulation: 16kbps bi-phase FSK
Supply: 5V at 28mA transmit, 22mA receive/idle
Transmit power: +10dBm (10mW)
Receiver sensitivity: -107dBm (for 1% BER)
32 byte data buffer
Adjacent channel rejection: 65db @ ±320kHz
Receiver Blocking: 84dB
TDL2A Data Sheet
page 1
Radiometrix Ltd
Radiometrix Ltd
TDL2A Data Sheet
Figure 2: TDL2A block diagram
page 2
side view (through can)
7 mm
side view (with can)
top view (without can)
RF GND 1
Antenna 2
RF GND 3
4
5
6
No pin
7
8
9
30.48 mm
33 mm
18
17
16
15
14
13
12
11
10
GND
Vcc
ENABLE
SETUP
TXD
NC
RXD
STATUS
GND
23 mm
recommended PCB hole size: 1.2 mm
module footprint size: 25 x 32 mm
pin pitch: 2.54 mm
pins 4, 5, 6, 7, 8 & 9 are not fitted
Figure 3: TDL2A footprint (top view)
Pin description
Pin
18
17
16
15
14
13
12
11
10
Name
GND
Vcc
ENABLE
SETUP
TXD
NC
RXD
STATUS
GND
Function
Ground
5V (regulated power supply)
Enable or DTR (5V CMOS logic level input)
Test/Setup mode selection
Transmit Data (Inverted RS232 at 5V CMOS logic level)
No Pin
Receive Data (Inverted RS232 at 5V CMOS logic level)
Busy or CTS (5V CMOS logic level output)
Ground
RF GND
pin 1 & 3
RF Ground pin, internally connected to the module screen and pin 8, 9, 10 and 18 (0V). This pin should
be connected to the RF return path (e.g. co-axial cable braid, main PCB ground plane, etc).
RF
pin 2
50Ω RF input/output from the antenna, it is DC isolated internally. (see antenna section for details).
GND
pin 8, 9, 10 and 18
Supply ground connection to ground plane and can.
VCC
pin 17
5V voltage regulator should be used to have a clean 5V supply to the module. A 4V regulator is used
inside for radio circuitry.
pin 16
ENABLE
Active low Enable pin. It has a 47kΩ pull-ups to Vcc. It should be pulled Low to enable the module.
This can also be connected to DTR pin (only if it is asserted by the host) of an RS232 serial port via a
MAX232 or equivalent RS232-CMOS level converter.
Radiometrix Ltd
TDL2A Data Sheet
page 3
SETUP
pin 15
Active low input to enter configuration or diagnostic test mode. It has a 47kΩ pull-ups to Vcc
TXD
pin 14
This is inverted RS232 data input at 5V CMOS logic level. It can be directly interfaced to data output of
a UART in a microcontroller or to a TXD pin of an RS232 serial port via a MAX232 or equivalent
RS232-CMOS level converter. TXD does not have an internal pull-up. If TDL2A is used in Receive only
mode, TXD should be tied to Vcc.
NC
pin 13
There is no pin in this position.
RXD
pin 12
This is inverted RS232 data output at 5V CMOS logic level. It can be directly interfaced to data input of
a UART in a microcontroller or to a RXD pin of an RS232 serial port via a MAX232 or equivalent
RS232-CMOS level converter.
pin 11
STATUS
This pin goes high when valid data is present in the receive buffer. It can be used to trigger an
interrupt in the host to download received data packet instead of waiting for it. It can be also be used as
a primitive CTS signal. It is inverted RS232 data output at 5V CMOS logic level. It can be directly
interfaced to an input of a microcontroller as a Data Detect (DD) or to CTS, DSR, DCD pins of an RS232
serial port via a MAX232 or equivalent RS232-CMOS level converter. This is can only be used to
prevent host from uploading any data before downloading already received data, because transmission
is prioritised over reception and any data to be transmitted will erase received data which is in the
common buffer.
Serial interface – modem operation
To connect to a true RS232 device, inverting RS232-CMOS level shifters must be used. Maxim MAX232
or equivalent are ideal, but simple NPN transistor switches with pull-ups often suffice. With typical
microcontrollers and UARTs, direct connection is possible.
The Radio / data stream interface
A 32 byte software FIFO is implemented in both the transmit and receive sub-routine. At the
transmitting end this is used to allow for the transmitter start up time (about 3mS), while on receiving
end it buffers arriving packets to the constant output data rate. All timing and data formatting tasks
are handled by the internal firmware. The user need not worry about keying the transmitter before
sending data as the link is entirely transparent.
For transmission across the radio link data is formatted into packets, each comprising 3 bytes of data
and a sync code. If less than 3 bytes are in the transmit end FIFO then a packet is still sent, but idle
codes replaces the unused bytes. When the transmit end FIFO is completely emptied, then the
transmitter is keyed off.
Operation: Radio interface.
Raw data is not fed to the radios. A coding operation in the transmit sub-routine, and decoding in the
receiver, isolate the AC coupled, potentially noisy baseband radio environment from the datastream.
The radio link is fed a continuous tone by the modem. As in bi-phase codes, information is coded by
varying the duration consecutive half-cycles of this tone. In our case half cycles of 62.5us and 31.25us
are used. In idle (or 'preamble') state, a sequence of the longer cycles is sent (resembling an 8KHz tone).
A packet comprises the Synchronising (or address) part, followed by the Data part, made up of twelve
Groups (of four half cycles duration). Each Group encodes 2 data bits, so one byte is encoded by 4
Groups.
Radiometrix Ltd
TDL2A Data Sheet
page 4
Figure 4: TDL2A transmitting and receiving
The oscilloscope screen capture shows a single byte being transmitted by TDL2A. A BiM2-433-64
transceiver is used to capture the transmitted data The character appears on the serial data output
(RXD) pin of the other TDL2A after about 12.5ms. Busy (STATUS) pin is momentarily set high to
indicate the presence of a valid data in the receive buffer of the TDL2A.
It can be clearly seen that unlike raw radio modules, TDL2A does not output any noise when there is
not any transmission. Data fed into the TXD input of a TDL2A appears at the RXD output of another
TDL2A within radio range in the original form it was fed.
Figure 5: 16kbps Bi-phase encoded continuous data stream (expanded view)
Continuous serial data at 9600bps (above) is encoded as half-cycles of 8kHz (62.5µs long bit) and 16kHz
(31.25µs short bit).
Radiometrix Ltd
TDL2A Data Sheet
page 5
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