PD -91805
IRL1104
HEXFET
®
Power MOSFET
Logic-Level Gate Drive
q
Advanced Process Technology
q
Ultra Low On-Resistance
q
Dynamic dv/dt Rating
q
175°C Operating Temperature
q
Fast Switching
q
Fully Avalanche Rated
Description
q
D
V
DSS
= 40V
G
S
R
DS(on)
= 0.008Ω
I
D
= 104A
Fifth Generation HEXFET
®
power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve the lowest possible on-resistance
per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET
®
power MOSFETs are well known for, provides
the designer with an extremely efficient device for use in a
wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
Max.
104
74
416
167
1.1
±16
340
62
17
5.0
-55 to + 175
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θCS
R
θJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Min.
––––
––––
––––
Typ.
––––
0.50
––––
Max.
0.9
––––
62
Units
°C/W
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1
10/19/99
IRL1104
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Static Drain-to-Source On-Resis-
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
40
–––
–––
–––
1.0
53
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.04
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
18
257
32
64
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
0.008
V
GS
= 10V, I
D
= 62A
Ω
0.012
V
GS
= 4.5V, I
D
= 52A
–––
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 25V, I
D
= 62A
25
V
DS
= 40V, V
GS
= 0V
µA
250
V
DS
= 32V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 16V
nA
-100
V
GS
= -16V
68
I
D
= 62A
24
nC V
DS
= 32V
33
V
GS
= 4.5V, See Fig. 6 and 13
–––
V
DD
= 20V
–––
I
D
= 62A
ns
–––
R
G
= 3.6Ω, V
GS
= 4.5V
–––
R
D
= 0.4Ω, See Fig. 10
Between lead,
4.5 –––
6mm (0.25in.)
nH
from package
7.5 –––
and center of die contact
3445 –––
V
GS
= 0V
1065 –––
pF V
DS
= 25V
270 –––
ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
MOSFET symbol
––– ––– 104
showing the
A
G
integral reverse
––– ––– 416
p-n junction diode.
––– ––– 1.3
V
T
J
= 25°C, I
S
= 62A, V
GS
= 0V
––– 84 126
ns
T
J
= 25°C, I
F
= 62A
––– 223 335
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
D
S
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
= 15V, starting T
J
= 25°C, L = 0.18mH
R
G
= 25Ω, I
AS
=62A. (See Figure 12)
I
SD
≤
62A, di/dt
≤
217A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C
Notes:
Pulse width
≤
300µs; duty cycle
≤
2%.
Calculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
2
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IRL1104
1000
I
D
, Drain-to-Source Current (A)
100
I
D
, Drain-to-Source Current (A)
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
TOP
1000
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
TOP
100
10
10
2.7V
2.7V
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
1
0.1
1
0.1
20µs PULSE WIDTH
T
J
= 175
°
C
1
10
100
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
2.5
I
D
, Drain-to-Source Current (A)
T
J
= 25
°
C
T
J
= 175
°
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 104A
2.0
100
1.5
1.0
10
0.5
1
2.0
V DS =
25
50V
20µs PULSE WIDTH
4.0
6.0
8.0
10.0
0.0
-60 -40 -20
V
GS
= 10V
0
20 40 60 80 100 120 140 160 180
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRL1104
6000
5000
V
GS
, Gate-to-Source Voltage (V)
V
GS
=
C
iss
=
C
rss
=
C
oss
=
0V,
f = 1MHz
C
gs
+ C
gd ,
C
ds
SHORTED
C
gd
C
ds
+ C
gd
10
I
D
= 62 A
V
DS
= 32V
V
DS
= 20V
8
C, Capacitance (pF)
4000
C
iss
6
3000
4
2000
C
oss
1000
2
C
rss
0
1
10
100
0
0
20
40
FOR TEST CIRCUIT
SEE FIGURE 13
60
80
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
10000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
I
SD
, Reverse Drain Current (A)
I
D
, Drain Current (A)
100
T
J
= 175
°
C
1000
10us
100
10
100us
T
J
= 25
°
C
1
1ms
10
10ms
0.1
0.2
V
GS
= 0 V
0.8
1.4
2.0
2.6
1
1
T
C
= 25 °C
T
J
= 175 °C
Single Pulse
10
100
V
SD
,Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRL1104
120
LIMITED BY PACKAGE
100
V
DS
V
GS
R
G
R
D
D.U.T.
+
I
D
, Drain Current (A)
80
-
V
DD
4.5V
60
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
40
Fig 10a.
Switching Time Test Circuit
V
DS
90%
20
0
25
50
75
100
125
150
175
T
C
, Case Temperature ( ° C)
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10b.
Switching Time Waveforms
1
Thermal Response (Z
thJC
)
D = 0.50
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
1
0.1
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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