74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
Rev. 03 — 12 January 2005
Product data sheet
1. General description
The 74LVT16652A is a high-performance BiCMOS product designed for V
CC
operation at
3.3 V. The device can be used as two 8-bit transceivers or one 16-bit transceiver.
Complimentary output enable (OEAB and OEBA) inputs are provided to control the
transceiver functions. Select control (SAB and SBA) inputs are provided to select whether
real-time or stored data is transferred. A LOW input level selects real-time data, and a
HIGH input level selects stored data. The circuitry used for select control eliminates the
typical decoding glitch that occurs in a multiplexer during the transition between stored
and real-time data.
Data on the A or B bus, or both, can be stored in the internal flip-flops by LOW-to-HIGH
transitions at the appropriate clock (CPAB or CPBA) inputs regardless of the levels on the
select control or output enable inputs. When SAB and SBA are in real-time transfer mode,
it is possible to store data without using the internal D-type flip-flops by simultaneously
enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus,
when all other data sources to the two sets of bus lines are at high- impedance, each set
of bus lines remains at its last level configuration.
2. Features
s
s
s
s
s
s
s
s
s
s
s
s
16-bit bus interface
3-state buffers
Output capability: +64 mA and
−32
mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion and extraction permitted
Power-up reset
Power-up 3-state
No bus current loading when output is tied to 5 V bus
Latch-up protection exceeds 500 mA per JESD78
ESD protection:
x
MIL STD 883 method 3015: exceeds 2000 V
x
Machine model: exceeds 200 V
Philips Semiconductors
74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
3. Quick reference data
Table 1:
Quick reference data
T
amb
= 25
°
C.
Symbol Parameter
t
PLH
propagation delay
nAx to nBx or nBx to
nAx
propagation delay
nAx to nBx or nBx to
nAx
input capacitance
control pins
I/O pin capacitance
Conditions
C
L
= 50 pF; V
CC
= 3.3 V
Min
-
Typ
2.1
Max
-
Unit
ns
t
PHL
C
L
= 50 pF; V
CC
= 3.3 V
-
2.4
-
ns
C
I
C
I/O
I
CC
V
I
= 0 V or 3.0 V
outputs disabled;
V
I
= 0 V or 3.0 V
-
-
-
3
9
70
-
-
-
pF
pF
µA
quiescent supply current outputs disabled;
V
CC
= 3.6 V
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74LVT16652ADGG
74LVT16652ADL
−40 °C
to +85°C
−40 °C
to +85°C
TSSOP56
SSOP56
Description
Version
plastic thin shrink small outline package; 56 leads; SOT364-1
body width 6.1 mm
plastic shrink small outline package; 56 leads;
body width 7.5 mm
SOT371-1
Type number
9397 750 14402
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
2 of 21
Philips Semiconductors
74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
5. Functional diagram
5
6
8
9
10
12
13
14
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
2
3
55
54
1CPAB
1SAB
1CPBA
1SBA
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
1OEAB
1OEBA
1
56
52
51
49
48
47
45
44
43
15
16
18
19
20
22
23
24
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
27
26
30
31
2CPAB
2SAB
2CPBA
2SBA
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
2OEAB
2OEBA
28
29
42
41
40
38
37
36
34
33
001aac344
Fig 1. Logic symbol
56
1
54
3
55
2
EN1[BA]
EN2[AB]
G5
G6
C3
C4
1
1
5
3D
52
29
28
31
26
31
27
EN7[BA]
EN8[AB]
G11
G12
C9
C10
1
7
11 9D
42
5
15
5 1
1
4D 6
2
6
1
6
8
9
10
12
13
14
51
49
48
47
45
44
43
16
17
19
20
21
23
24
11 1
1
10D 12
8
1 12
41
40
38
37
36
34
33
001aac345
Fig 2. IEC Logic symbol
9397 750 14402
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
3 of 21
Philips Semiconductors
74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
6. Pinning information
6.1 Pinning
1OEAB
1CPAB
1SAB
GND
1A0
1A1
V
CC
1A2
1A3
1
2
3
4
5
6
7
8
9
56 1OEBA
55 1CPBA
54 1SBA
53 GND
52 1B0
51 1B1
50 V
CC
49 1B2
48 1B3
47 1B4
46 GND
45 1B5
44 1B6
43 1B7
42 2B0
41 2B1
40 2B2
39 GND
38 2B3
37 2B4
36 2B5
35 V
CC
34 2B6
33 2B7
32 GND
31 2SBA
30 2CPBA
29 2OEBA
001aac347
1A4 10
GND 11
1A5 12
1A6 13
1A7 14
2A0 15
2A1 16
2A2 17
GND 18
2A3 19
2A4 20
2A5 21
V
CC
22
2A6 23
2A7 24
GND 25
2SAB 26
2CPAB 27
2OEAB 28
16652A
Fig 4. Pin configuration
6.2 Pin description
Table 3:
Symbol
1OEAB
1CPAB
1SAB
GND
1A0
1A1
V
CC
1A2
9397 750 14402
Pin description
Pin
1
2
3
4
5
6
7
8
Description
A to B output enable input
A to B clock input
A to B select input
ground (0 V)
data input or output (A-side)
data input or output (A-side)
supply voltage
data input or output (A-side)
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
5 of 21
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