Numonyx™ StrataFlash Wireless Memory
(L18)
28F128L18, 28F256L18
Datasheet
Product Features
High performance Read-While-Write/Erase
— 85 ns initial access
— 54 MHz with zero wait state, 14 ns clock-to-
data output synchronous-burst mode
— 25 ns asynchronous-page mode
— 4-, 8-, 16-, and continuous-word burst
mode
— Burst suspend
— Programmable WAIT configuration
— Buffered Enhanced Factory Programming
(BEFP) at 5 µs/byte (Typ)
— 1.8 V low-power buffered programming at
7 µs/byte (Typ)
Architecture
— Asymmetrically-blocked architecture
— Multiple 8-Mbit partitions: 128-Mbit devices
— Multiple 16-Mbit partitions: 256-Mbit
devices
— Four 16-Kword parameter blocks: top or
bottom configurations
— 64-Kword main blocks
— Dual-operation: Read-While-Write (RWW)
or Read-While-Erase (RWE)
— Status Register for partition and device status
Power
— V
CC
(core) = 1.7 V - 2.0 V
— V
CCQ
(I/O) = 1.35 V - 2.0 V, 1.7 V - 2.0 V
— Standby current: 30 µA (Typ) for 256-Mbit
— 4-Word synchronous read current: 15 mA
(Typ) at 54 MHz
— Automatic Power Savings mode
Security
— OTP space: 64 unique factory device
identifier bits; 64 user-programmable OTP
bits; Additional 2048 user-programmable
OTP bits
— Absolute write protection: V
PP
= GND
— Power-transition erase/program lockout
— Individual zero-latency block locking
— Individual block lock-down
Software
— 20 µs (Typ) program suspend
— 20 µs (Typ) erase suspend
— Numonyx
®
Flash Data Integrator optimized
— Basic Command Set (BCS) and Extended
Command Set (ECS) compatible
— Common Flash Interface (CFI) capable
Quality and Reliability
— Expanded temperature: –25° C to +85° C
— Minimum 100,000 erase cycles per block
— Intel ETOX* VIII process technology (0.13
µm)
Density and Packaging
— 128- and 256-Mbit density in VF BGA
packages
— 128/0 and 256/0 density in SCSP
— 16-bit wide data bus
Order Number: 251902-12
November 2007
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND
CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A
PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx
products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Legal L ines and D isc laim er s
Numonyx B.V. may make changes to specifications and product descriptions at any time, without notice.
Numonyx B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented
subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or
otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting
Numonyx's website at
http://www.numonyx.com.
Numonyx, the Numonyx logo, and StrataFlash are trademarks or registered trademarks of Numonyx B.V. or its subsidiaries in other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2007, Numonyx B.V., All Rights Reserved.
Datasheet
2
November 2007
251902-12
Numonyx™ StrataFlash
®
Wireless Memory (L18)
Contents
1.0
Introduction
.............................................................................................................. 8
1.1
Nomenclature ..................................................................................................... 8
1.2
Acronyms........................................................................................................... 9
1.3
Conventions ....................................................................................................... 9
Functional Overview
................................................................................................ 10
Package Information
............................................................................................... 11
3.1
VF BGA Packages .............................................................................................. 11
3.2
SCSP Packages ................................................................................................. 13
Ballout and Signal Descriptions
............................................................................... 15
4.1
Signal Ballout ................................................................................................... 15
4.1.1 VF BGA Package Ballout .......................................................................... 15
4.1.2 SCSP Package Ballout ............................................................................. 17
4.2
Signal Descriptions ............................................................................................ 18
4.2.1 VF BGA Package Signal Descriptions ......................................................... 18
4.2.2 128/0 and 256/0 SCSP Package Signal Descriptions .................................... 19
4.3
Memory Map..................................................................................................... 20
Maximum Ratings and Operating Conditions............................................................
23
5.1
Absolute Maximum Ratings................................................................................. 23
5.2
Operating Conditions ......................................................................................... 23
Electrical Specifications
........................................................................................... 24
6.1
DC Current Characteristics.................................................................................. 24
6.2
DC Voltage Characteristics.................................................................................. 25
AC Characteristics
................................................................................................... 26
7.1
AC Test Conditions ............................................................................................ 26
7.2
Capacitance...................................................................................................... 27
7.3
AC Read Specifications (VCCQ = 1.35 V – 2.0 V) ................................................... 27
7.4
AC Read Specifications 128-Mbit (VCCQ = 1.7–2.0 V) ............................................ 28
7.5
AC Read Specifications 256-Mbit (VCCQ = 1.7–2.0 V) ............................................ 30
7.6
AC Write Specifications ...................................................................................... 35
7.7
Program and Erase Characteristics....................................................................... 38
Power and Reset Specifications
............................................................................... 40
8.1
Power Up and Down .......................................................................................... 40
8.2
Reset............................................................................................................... 40
8.3
Power Supply Decoupling ................................................................................... 41
8.4
Automatic Power Saving..................................................................................... 41
Device Operations
................................................................................................... 42
9.1
Bus Operations ................................................................................................. 42
9.1.1 Reads ................................................................................................... 42
9.1.2 Writes................................................................................................... 43
9.1.3 Output Disable ....................................................................................... 43
9.1.4 Standby ................................................................................................ 43
9.1.5 Reset.................................................................................................... 43
9.2
Device Commands............................................................................................. 44
9.3
Command Definitions......................................................................................... 45
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0 Read Operations
...................................................................................................... 48
10.1 Asynchronous Page-Mode Read ........................................................................... 48
10.2 Synchronous Burst-Mode Read............................................................................ 48
November 2007
251902-12
Datasheet
3
Numonyx™ StrataFlash
®
Wireless Memory (L18)
10.3
10.2.1 Burst Suspend........................................................................................49
Read Configuration Register (RCR) .......................................................................49
10.3.1 Read Mode.............................................................................................50
10.3.2 Latency Count ........................................................................................50
10.3.3 WAIT Polarity .........................................................................................52
10.3.3.1 WAIT Signal Function.................................................................52
10.3.4 Data Hold ..............................................................................................53
10.3.5 WAIT Delay............................................................................................54
10.3.6 Burst Sequence ......................................................................................54
10.3.7 Clock Edge.............................................................................................55
10.3.8 Burst Wrap ............................................................................................55
10.3.9 Burst Length ..........................................................................................55
11.0 Programming Operations
.........................................................................................56
11.1 Word Programming ............................................................................................56
11.1.1 Factory Word Programming......................................................................57
11.2 Buffered Programming .......................................................................................57
11.3 Buffered Enhanced Factory Programming ..............................................................58
11.3.1 Buffered EFP Requirements and Considerations...........................................58
11.3.2 Buffered EFP Setup Phase ........................................................................59
11.3.3 Buffered EFP Program/Verify Phase ...........................................................59
11.3.4 Buffered EFP Exit Phase ...........................................................................60
11.4 Program Suspend ..............................................................................................60
11.5 Program Resume ...............................................................................................60
11.6 Program Protection ............................................................................................61
12.0 Erase Operations......................................................................................................62
12.1 Block Erase .......................................................................................................62
12.2 Erase Suspend ..................................................................................................62
12.3 Erase Resume ...................................................................................................63
12.4 Erase Protection ................................................................................................63
13.0 Security Modes
........................................................................................................64
13.1 Block Locking ....................................................................................................64
13.1.1 Lock Block .............................................................................................64
13.1.2 Unlock Block ..........................................................................................64
13.1.3 Lock-Down Block ....................................................................................64
13.1.4 Block Lock Status ...................................................................................65
13.1.5 Block Locking During Suspend ..................................................................65
13.2 Protection Registers ...........................................................................................66
13.2.1 Reading the Protection Registers...............................................................67
13.2.2 Programming the Protection Registers .......................................................68
13.2.3 Locking the Protection Registers ...............................................................68
14.0 Dual-Operation Considerations
................................................................................69
14.1 Memory Partitioning ...........................................................................................69
14.2 Read-While-Write Command Sequences................................................................69
14.2.1 Simultaneous Operation Details ................................................................70
14.2.2 Synchronous and Asynchronous RWW Characteristics and Waveforms ...........70
14.2.2.1 Write operation to asynchronous read transition ............................70
14.2.2.2 Write to synchronous read operation transition..............................70
14.2.2.3 Write Operation with Clock Active ................................................71
14.2.3 Read Operation During Buffered Programming ............................................71
14.3 Simultaneous Operation Restrictions ....................................................................72
15.0 Special Read States..................................................................................................73
15.1 Read Status Register..........................................................................................73
Datasheet
4
November 2007
251902-12
Numonyx™ StrataFlash
®
Wireless Memory (L18)
15.2
15.3
15.1.1 Clear Status Register .............................................................................. 74
Read Device Identifier........................................................................................ 74
CFI Query ........................................................................................................ 75
Appendix A Write State Machine (WSM)
.......................................................................... 76
Appendix B Flowcharts....................................................................................................
83
Appendix C Common Flash Interface
............................................................................... 91
Appendix D Additional Information
............................................................................... 101
Appendix E Ordering Information..................................................................................
102
November 2007
251902-12
Datasheet
5
FPGA/CPLD
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