TH8062
Voltage Regulator with LIN Transceiver
Features
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Compatible to LIN Specification 2.0 and SAE J2602
Operating voltage V
S
= 6 ... 18 V
Low standby current consumption of typ. 15
μA
in sleep mode
“noload” current < 200µA
Linear low drop voltage regulator 5V/70mA ±2%
Output current limitation
LIN-Bus Transceiver
Compatible to ISO9141 functions
Baud rate up to 20 kBaud
Slew rate control for best EME behavior
Low slew mode for optimized SAE J2602 transmission
High EMI immunity
High signal symmetry for using in RC – based slave nodes up to 2% clock tolerance
Current limitation
Bus input voltages -24V to 30V independent from VBat
Wake-up via LIN bus traffic
Reset output (default 8ms/4.65V)
Reset time adjustable to 4ms, 15ms and 30ms during IC final test
Over temperature shutdown
Automotive temperature range of –40°C to 125°C
CMOS compatible interface to microcontroller
Load dump protected (40V)
Small SOIC8 package
Pin compatible to the Melexis TH8061
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Ordering Information
Part No.
TH8062 KDC AA
On Request
TH8062 KDC AB
TH8062 KDC AC
TH8062 KDC AD
Temperature Range
K (-40 to 125 °C)
K (-40 to 125 °C)
K (-40 to 125 °C)
K (-40 to 125 °C)
Package
DC (SOIC8)
DC (SOIC8)
DC (SOIC8)
DC (SOIC8)
Version
A
A
A
A
POR-Time
A (8ms)
B (4ms)
C (30ms)
D (15ms)
General Description
The TH8062 consists of a low-drop voltage regulator 5V/70mA and a LIN bus transceiver. The LIN
transceiver is suitable for LIN bus systems conform to LIN specification revision 2.0 and SAE J2602.
The combination of voltage regulator and bus transceiver makes it possible to develop simple, but powerful
and cheap slave nodes in LIN Bus systems.
TH8062 – Datasheet
3901008062
Page 1 of 38
March 2006
Rev 002
TH8062
Voltage Regulator with LIN Transceiver
Contents
1.
2.
Functional Diagram ............................................................................................................................... 4
Electrical Specification.......................................................................................................................... 5
2.1
Operating Conditions ....................................................................................................................................... 5
2.2
Absolute Maximum Ratings ............................................................................................................................. 5
2.3
Static Characteristics ....................................................................................................................................... 6
2.3.1.
Voltage Regulator and Reset Unit .......................................................................................................... 6
2.3.2.
LIN Bus Interface.................................................................................................................................... 8
2.4
Dynamic Characteristics .................................................................................................................................. 9
2.5
Timing Diagrams ............................................................................................................................................ 11
3.
Functional Description ........................................................................................................................ 13
3.1
Operating Modes............................................................................................................................................ 13
3.2
Initialization .................................................................................................................................................... 15
3.3
Wake-Up ........................................................................................................................................................ 15
3.4
VSUP under voltage reset.............................................................................................................................. 16
3.5
Overtemperature Shutdown ........................................................................................................................... 16
3.6
LIN BUS Transceiver ..................................................................................................................................... 17
3.7
Linear Regulator............................................................................................................................................. 20
3.8
RESET ........................................................................................................................................................... 21
3.8.1.
Programmability of Power-ON-Reset Delay ......................................................................................... 21
3.9
Mode Input EN ............................................................................................................................................... 22
4.
4.1
4.2
4.3
4.4
4.5
Application Hints ................................................................................................................................. 24
Safe Operating Area ...................................................................................................................................... 24
Low Dropout Regulator .................................................................................................................................. 25
Application Circuitry ....................................................................................................................................... 27
EMI Supressing.............................................................................................................................................. 27
Connection to Flash-MCU .............................................................................................................................. 28
5.
Operating during Disturbance............................................................................................................ 29
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
Operating without VSUP or GND ................................................................................................................... 29
Short Circuit BUS against VBAT .................................................................................................................... 29
Short Circuit BUS against GND...................................................................................................................... 29
Short Circuit TxD against GND ...................................................................................................................... 29
TxD open ....................................................................................................................................................... 29
Short Circuit VCC against GND ..................................................................................................................... 29
Overload of VCC ............................................................................................................................................ 29
Undervoltage VCC ......................................................................................................................................... 29
Undervoltage VSUP ....................................................................................................................................... 30
Short circuit RxD, RESET against GND or VCC ............................................................................................ 30
6.
7.
8.
8.1
8.2
PIN Description .................................................................................................................................... 31
Mechanical Specification .................................................................................................................... 32
Tape and Reel Specification ............................................................................................................... 33
Tape Specification.......................................................................................................................................... 33
Reel Specification .......................................................................................................................................... 34
9.
9.1
9.2
9.3
ESD/EMC Remarks .............................................................................................................................. 35
General Remarks ........................................................................................................................................... 35
ESD-Test ....................................................................................................................................................... 35
EMC ............................................................................................................................................................... 35
10.
11.
12.
Revision History................................................................................................................................... 36
Assembly Information ......................................................................................................................... 37
Disclaimer............................................................................................................................................. 38
TH8062 – Datasheet
3901008062
Page 2 of 38
March 2006
Rev 002
TH8062
Voltage Regulator with LIN Transceiver
List of Figures
Figure 1 - Block diagram.......................................................................................................................... 4
Figure 2 - Timing diagram for propagation delays................................................................................. 11
Figure 3 - Timing diagram for duty cycle acc. to LIN 2.0 and J2602..................................................... 11
Figure 4 - Timing Diagram for EN mode selection ................................................................................ 12
Figure 5 - State diagram of operating modes........................................................................................ 13
Figure 6 - Operating of power-on and under-voltage reset ................................................................... 15
Figure 7 - Receive mode impulse diagram............................................................................................ 17
Figure 8 - TxD input circuitry ................................................................................................................. 18
Figure 9 - RxD output circuitry............................................................................................................... 19
Figure 10 - Characteristic of current limitation VCC = f (I
VCC
) ............................................................... 20
Figure 11 - Reset behaviour .................................................................................................................. 21
Figure 12 - Output current of reset output vs. VCC voltage .................................................................. 21
Figure 13 - EN input circuitry ................................................................................................................. 22
Figure 14 - EN controlled via MCU........................................................................................................ 22
Figure 15 - Permanent normal mode..................................................................................................... 23
Figure 16 - Power dissipation LIN transceiver @ 20kbit ....................................................................... 24
Figure 17 - Save operating area............................................................................................................ 25
Figure 18 - ESR Curves for 6.8μF
≤
C
L
≤
100μF and Frequency of 100 kHz ....................................... 26
Figure 19 - Application circuit (slave node) ........................................................................................... 27
Figure 20 – Example circuitry for connection of RxD to MCU for flash programming........................... 28
TH8062 – Datasheet
3901008062
Page 3 of 38
March 2006
Rev 002
TH8062
Voltage Regulator with LIN Transceiver
1. Functional Diagram
VSUP
Aux.
Supply
Vaux
VCC
control
amplifier
current
limitation
Reset
Generator
MR
BG
VBG
Adjust
ment
SBY
Vaux
TSHD
Temp.
Protection
SBY
MR
POR
4.65 V
EN
VCC
20μs
Mode
Control
Osc
Reset
POR-
Timer
4/8/15/30ms
VBAT_Res
VCC
VBAT-
Reset
VSUP
Vaux
Vaux
Wake-up
Control
RESET-
Buffer
RESET
Wake-Filter
Receiver
VSUP
Vaux
70μs
RxD-
Buffer
VCC
Rec-Filter
30k
RxD
VCC
Transmitter
SBY
BUS
GND
Driver
control
15k
Filter
MR
TxD
Figure 1 - Block diagram
TH8062 – Datasheet
3901008062
Page 4 of 38
March 2006
Rev 002
TH8062
Voltage Regulator with LIN Transceiver
2. Electrical Specification
All voltages are referenced to ground (GND). Positive currents flow into the IC.
The absolute maximum ratings (in accordance with IEC 134) given in the table below are limiting values that
do not lead to a permanent damage of the device but exceeding any of these limits may do so. Long term
exposure to limiting values may affect the reliability of the device. Correct operating of the device cannot be
guaranteed if any of these limits are exceeded.
2.1 Operating Conditions
Parameter
Supply voltage
Output voltage
Operating ambient temperature
Junction temperature
Symbol
V
SUP
V
CC
T
A
T
J
Min
6
4.85
-40
Max
18
5.15
+125
+150
Unit
V
V
°C
°C
2.2 Absolute Maximum Ratings
Parameter
Supply voltage at VSUP
Jump start capability
Load dump
Input voltage at pin BUS
Difference VSUP-VCC
Input voltage at pin EN
Input voltage at pin TxD, RxD, RESET
Input current at pin EN, TxD, RxD, RESET
Input current for short circuit of pin VSUP and VCC
ESD Capability on pin BUS, VBAT, GND
ESD Capability on pin TxD, RxD, EN, RESET, VCC
Power dissipation
Thermal resistance from junction to ambient
Junction temperature
[2]
Storage temperature
[1]
[2]
See chapter 4.1 Safe Operating Area
See chapter 3.5 Overtemperature Shutdown
Symbol
Condition
Min
-1.0
Max
18
30
40
30
40
40
V
SUP
+0.3
V
CC
+0.3
25
500
4
2
Unit
V
SUP
T
≤
300 s
T
≤
500ms
-
-
-24
-
-0.3
-0.3
-0.3
-25
-500
V
V
BUS
V
SUP
-V
CC
V
INEN
V
IN
I
IN
I
INSH
ESD
BUSHB
ESD
BUSHB
P
0
R
THJA
T
J
T
STG
T
≤
500ms
V
V
V
V
mA
mA
kV
kV
Human body Model, 100pF
via 1.5kΩ
Human body Model, 100pF
via 1.5kΩ
-4
-2
Internal limited
[1]
130
150
-55
150
K/W
°C
°C
TH8062 – Datasheet
3901008062
Page 5 of 38
March 2006
Rev 002
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