KM6164000B Family
Document Title
256Kx16 bit Low Power CMOS Static RAM
CMOS SRAM
Revision History
Revision No.
0.0
0.1
History
Initial draft
Revise
- Die name change ; A to B
Finalize
Revise
- Operating current update and release.
I
CC
(Read/Write) = 30/60
→
15/75mA
I
CC1
(Read/Write) = 30/60
→
15/75mA
I
CC2
= 160
→
130mA
Revise
- Change datasheet format
- Remove I
CC
write value from table.
Revise
- Change test load at 55ns: 100pF
→
50pF
Errarta correction
Draft Data
June 28, 1996
September 19, 1996
Remark
Advance
Preliminary
1.0
2.0
December 17, 1996
February 17, 1997
Final
Final
3.0
February 17, 1998
Final
4.0
4.01
June 22, 1998
August 8, 1998
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 4.01
June 1998
KM6164000B Family
256Kx16 bit Low Power CMOS Static RAM
FEATURES
•
•
•
•
•
•
Process Technology: TFT
Organization: 256Kx16
Power Supply Voltage : 4.5~5.5V
Low Data Retention Voltage: 2V(Min)
Three state output and TTL Compatible
Package Type: 44-TSOP2-400F/R
CMOS SRAM
GENERAL DESCRIPTION
The KM616V4000B families are fabricated by SAMSUNG′s
advanced CMOS process technology. The families support
various operating temperature ranges and small package
types for user flexibility of system design. The families also
support low data retention voltage for battery back-up opera-
tion with low data retention current.
PRODUCT FAMILY
Power Dissipation
Product Family
KM6164000BL-L
KM6164000BLI-L
Operating Temperature
Commercial(0~70°C)
Industrial(-40~85°C)
Vcc Range
Speed
55
1)
/70ns
70/100ns
Standby
(I
SB1
, Max)
20µA
50µA
Operating
(I
CC2
, Max)
130mA
PKG Type
4.5~5.5V
44-TSOP2-F/R
1. The parameter is measured with 50pF test load.
PIN DESCRIPTION
A4
A3
A2
A1
A0
CS
I/OI
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
N.C
A8
A9
A10
A11
A12
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
N.C
A8
A9
A10
A11
A12
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A4
A3
A2
A1
A0
CS
I/OI
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A17
A16
A15
A14
A13
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
A13
A14
A0
A1
A15
A16
A17
A2
A3
A4
I/O
1
~I/O
8
Precharge circuit.
Vcc
Vss
44-TSOP2
Forward
44-TSOP2
Reverse
Row
select
Memory array
1024 rows
256×16 columns
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
I/O
9
~I/O
16
Name
CS
OE
WE
A
0
~A
17
I/O
1
~I/O
16
Function
Chip Select Input
Output Enable Input
Write Enable Input
Address Inputs
Data Inputs/Outputs
Name
Vcc
Vss
UB
LB
N.C
Function
Power
Ground
Upper Byte(I/O
9~16
)
Lower Byte (I/O
1~8
)
No Connection
WE
OE
UB
LB
CS
A8 A9 A10 A5 A6 A7 A4 A12
Control
logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 4.01
June 1998
KM6164000B Family
PRODUCT LIST
Commercial Temperature Product(0~70°C)
Part Name
KM6164000BLT-5L
KM6164000BLT-7L
KM6164000BLR-5L
KM6164000BLR-7L
Function
44-TSOP2-F, 55ns, LL-pwr
44-TSOP2-F, 70ns, LL-pwr
44-TSOP2-R, 55ns, LL-pwr
44-TSOP2-R, 70ns, LL-pwr
CMOS SRAM
Industrial Temperature Products(-40~85°C)
Part Name
KM6164000BLTI-7L
KM6164000BLTI-10L
KM6164000BLRI-7L
KM6164000BLRI-10L
Function
44-TSOP2-F, 70ns, LL-pwr
44-TSOP2-F, 100ns, LL-pwr
44-TSOP2-R, 70ns, .LL-pwr
44-TSOP2-R, 100ns, LL-pwr
FUNCTIONAL DESCRIPTION
CS
H
L
L
L
L
L
L
L
L
OE
X
1)
H
X
1)
L
L
L
X
1)
X
1)
X
1)
WE
X
1)
H
X
1)
H
H
H
L
L
L
LB
X
1)
X
1)
H
L
H
L
L
H
L
UB
X
1)
X
1)
H
H
L
L
H
L
L
I/O
1~8
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
I/O
9~16
High-Z
High-Z
High-Z
High-Z
Dout
Dout
High-Z
Din
Din
Mode
Deselected
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
Power
Standby
Active
Active
Active
Active
Active
Active
Active
Active
1. X means don′t care. (Must be in low or high state)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Soldering temperature and time
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
T
A
T
SOLDER
Ratings
-0.5 to 7.0
-0.5 to7.0
1.0
-65 to 150
0 to 70
-40 to 85
260°C, 10sec(Lead Only)
Unit
V
V
W
°C
°C
°C
-
Remark
-
-
-
-
KM6164000BL-L
KM6164000BLI-L
-
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 4.01
June 1998
KM6164000B Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Min
4.5
0
2.2
-0.5
3)
Typ
5.0
0
-
-
CMOS SRAM
Max
5.5
0
Vcc+0.5
2)
0.8
Unit
V
V
V
V
Note:
1. Commercial Product : T
A
=0 to 70°C, otherwise specified
Industrial Product : T
A
=-40 to 85°C, otherwise specified
2. Overshoot : V
CC
+3.0V in case of pulse width
≤
30ns
3. Undershoot : -3.0V in case of pulse width
≤
30ns
4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply
Average operating current
Symbol
Test Conditions
V
IN
=Vss to Vcc
CS=V
IH
or OE=V
IH
or WE=V
IL,
V
IO
=Vss to Vcc
I
IO
=0mA, CS=V
IL
, V
IN
=V
IL
or V
IH
, Read
Cycle time=1µs, 100% duty, I
IO
=0mA
CS≤0.2V, V
IN
≤0.2V
or V
IN
≥Vcc-0.2V
Cycle time=Min, 100% duty, I
IO
=0mA, CS=V
IL,
V
IN
=V
IH
or V
IL
Min
Typ
Max
Unit
I
LI
I
LO
I
CC
I
CC1
I
CC2
-1
-1
-
Read
Write
-
-
-
-
2.4
-
-
-
-
-
-
-
-
-
-
-
-
1
1
15
15
75
130
0.4
-
3
20
1)
µA
µA
mA
mA
mA
V
V
mA
µA
Output low voltage
Output high voltage
Standby Current (TTL)
Standby Current(CMOS)
1. Industrial Product = 50µA
V
OL
V
OH
I
SB
I
SB1
I
OL
=2.1mA
I
OH
=-1.0mA
CS=V
IH,
Other inputs=V
IL
or V
IH
CS≥Vcc-0.2V, Other inputs=0~Vcc
4
Revision 4.01
June 1998
KM6164000B Family
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Test Input/Output Reference)
Input pulse level : 0.8 to 2.4V
Input rising and falling time : 5ns
Input and output reference voltage : 1.5V
Output load (See right) :C
L
=100pF+1TTL
C
L
=50pF+1TTL
C
L
1)
CMOS SRAM
1. Including scope and jig capacitance
AC CHARACTERISTICS
(Vcc=4.5~5.5V, Commercial product : T
A=
0 to 70°C, Industrial product : T
A
=-40 to 85°C)
Speed Bins
Parameter List
Symbol
55ns
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Read
Output enable to low-Z output
UB, LB enable to low-Z output
Chip disable to high-Z output
OE disable to high-Z output
UB, LB disable to high-Z output
Output hold from address change
LB, UB valid to data output
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
LB, UB valid to end of write
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
BLZ
t
HZ
t
OHZ
t
BHZ
t
OH
t
BA
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
t
BW
55
-
-
-
10
5
5
0
0
0
10
-
55
45
0
45
45
0
0
25
0
5
45
Max
-
55
55
25
-
-
-
20
20
20
-
25
-
-
-
-
-
-
20
-
-
-
-
Min
70
-
-
-
10
5
5
0
0
0
10
-
70
60
0
60
55
0
0
30
0
5
60
70ns
Max
-
70
70
35
-
-
-
25
25
25
-
35
-
-
-
-
-
-
25
-
-
-
-
100ns
Min
100
-
-
-
10
5
5
0
0
0
10
-
100
80
0
80
70
0
0
40
0
5
-
Max
-
100
100
50
-
-
-
30
30
30
-
50
-
-
-
-
-
-
30
-
-
-
80
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
1. Industrial Product : 20µA
Symbol
V
DR
I
DR
t
SDR
t
RDR
Test Condition
CS≥Vcc-0.2V
Vcc=3.0V
See data retention waveform
Min
2.0
-
0
5
Typ
-
-
-
-
Max
5.5
15
1)
-
-
Unit
V
µA
ms
5
Revision 4.01
June 1998
PCB设计
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