0.35µm 16-BIT 44.1KHZ SIGMA-DELTA STEREO DAC
µ
BW0405XA
GENERAL DESCRIPTION
This product is SD Digital-To-Analog Converter for digital audio System (CDP). The product contains Serial-to-
Parallel Converter and Compensation Filter, Digital Volume Attenuator by the MICOM Interface, De-Emphasis
Filter, FIR filter, Sinc Filter, digital sigma-delta modulator, analog postfilter, AIF (Anti-Image-Filter). The normal
input and output channels provides 90dB SNR (Signal to Noise Ratio) over in band (20kHz).
The product employs the 1bit 4th-order sigma-delta architecture with 16bit resolution, over sampling of 64X. And
analog postfilter with low clock sensitivity and linear phase, filters the shaping-nosie and outputs analog voltage
with high resolution. An on-chip reference voltage is included to allow single supply operations.
FEATURES
— 16bit SD Digital-To-Analog Converter
— On-Chip Analog Postfilter
— Filtered Line-Level Outputs, Linear Phase Filtering
— On-Chip Voltage Reference
— 90dB SNR
— Sampling Rate 44.1kHz
— Input Rate 1Fs or 2Fs by Normal Mode/Double Mode Selection
— Zero Input Detection Mute
— On-Chip Compensation Filter
— Input Volume Attenuator by the MICOM Interface
— On-Chip De-Emphasis Filter
— On-Chip 4 times oversampling Digital Filter
— Low Clock Jitter Sensitivity
— Single 3.3V~2.5V Power Supply
APPLICATIONS
CD Player, Portable CD Player, CD-ROM, Video-CD, Mini-Disk, DVD etc
1
BW0405XA
0.35µm 16-BIT 44.1KHZ SIGMA-DELTA STEREO DAC
µ
FUNCTIONAL BLOCK DIAGRAM
VDDD VSSD
VDDA VSSA
SDATA
BCK
LRCK
S/P
Converter
&
Attenuator
Compensation
Filter
&
De-emphsis
&
FIR Filter
Sinc Filter
&
Sigma-Delta
Modulator
DAC
&
Analog
Postfilter
AOUTL
Anti-Imaging
Filter
AOUTR
MICOM Interface
Timing Generation
Voltage
Reference
VREF
VHALF
IREF
M
C
L
K
M M
D L
A D
T
A
TP M B R
SD U I S
EL T S T
L
E TB
L O
N
P
M D D
S N E
C
E
K
M
S
E
R
R
O
R
B
S
D
I
A
G
O
F
S
6
4
O
D
S
L
O
D
S
R
I
F
S
6
4
I
A
D
S
L
I
A
D
S
R
2
0.35µm 16-BIT 44.1KHZ SIGMA-DELTA STEREO DAC
µ
BW0405XA
EMBEDDED CORE BLOCK DIAGRAM
External
Inputs
4
M
U
X
MSCK
BCK
LRCK
SDATA
V
S
S
D
V
D
D
D
V
D
D
A
V
S
S
A
External
AOUTL
AOUTR
VHALF
VREF
DEEM
DN
MUTEL
PDL
RSTB
MCLK
MLD
MDATA
BISTONP
TSEL
IFS64
IADSL
IADSR
4
MUX_SEL
4
Audio Processor
(DSP)
5
bw0405xa
IREF
SDIAG
SERRORB
OFS64
ODSL
ODSR
3
VSSD
5
These are test pins for internal blocks of the core.
So you don't need the internal test mode.
Make the test control pins disable ('L') state and
Output and bidirectional pins leave foalting.
EMBEDDED CORE USER GUIDE
— Digital serial data input and clock input refer to digital input format.
— Digital control pins inform refer to pin description.
— Micom I/F pin inform refer to micom interface.
— External application of analog output pins refer to application circuit.
— If you want to test only embedded analog core block (Sigma-Delta DAC), you can do it just adding the 4 pins to
supply digital serial input data (LRCK, BCK, SDATA, MSCK) and MUX block.
— Analog power(VDDA,VSSA) and digital power(VDDD, VSSD) should be seperated.
— Two pads should be dedicated to analog power(VDDA, VSSA)
— If you need not use test mode for the testability of internal core block, you make internal core block test pins
disable state. (Test Input pins are 'L' state and Test output, bidirection pins leave floating)
3
BW0405XA
0.35µm 16-BIT 44.1KHZ SIGMA-DELTA STEREO DAC
µ
CORE PIN DESCRIPTION
Symbol
Power Supply Pins
VDDD
VSSD
VDDA
VSSA
Digital Pins
MSCK
BCK
LRCK
SDATA
MCLK
MLD
MDATA
DEEM
DN
MUTEL
PDL
RSTB
Analog Pins
AOUTL
AOUTR
VHALF
VREF
BISTONP
TSEL
IFS64
IADSL
IADSR
SDIAG
SERRORB
OFS64
ODSL
ODSR
IREF
AO
AO
AO
AO
DI
DI
DI
DI
DI
DO
DO
DO
DO
DO
AB
poa_bb
poa_bb
poar50_bb
poar50_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
pot2_bb
pot2_bb
pot2_bb
pot2_bb
pot2_bb
poa_bb
Analog Output for L-CH
Analog Output for R-CH
Reference Voltage Output for Bypass
Reference Voltage Output for Bypass
Memory Bist Test Mode. "H" enabled
Test pin for Analog Postfilter Input Selection
64X Sampling Clock Input for Analog Postfilter (When TSEL=H)
Inputs for Analog Postfilter of L-CH (When TSEL=H)
Inputs for Analog Postfilter of R-CH (When TSEL=H)
Test Output pin for embeded memory BIST (BIST_ON="H")
Test Output Pin for Embeded memory BIST (BIST_ON="H")
64X Sampling Clock output for Digital sigma-delta Modulator
L-CH Output for Digital sigma-delta Modulator.
R-CH Output for Digital sigma-delta Modulator.
Test Pin for Analog Supply Current
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
Master Clock Input. 384Fs Clock
Bit Clock Input. (32Fs or 64Fs)
Sample Rate Clock Input. (Fs or 2Fs)
Serial Digital Input
Micom Interface Clock Input
Micom Interface Command load Input (When low,load)
Micom Interface Command Data Input
De-Emphasis On/Off. "H" is enabled. "L" is disabled.
Input Rate Select. High is Double(2Fs) Mode, Low is Normal(Fs) Mode.
Analog Output Mute. "L" enabled
Power Down. "L" enabled
Reset Input. "L" Enabled
DP
DG
AP
AG
vdd3t_bb
vsst_bb
vdd3t_bb
vsst_bb
Digital Supply
Digital Ground
Analog Supply
Analog Ground
I/O Type
I/O Pad
Description
Core Internal Block Test Pins
4
0.35µm 16-BIT 44.1KHZ SIGMA-DELTA STEREO DAC
µ
BW0405XA
I/O Type Abbr.
— AI: Analog Input
— DI: Digital Input
— AO: Analog Output
— DO: Digital Output
— AB: Analog Bidirectional
— DB: Digital Bidirectional
— AP: Analog Power
— DP: Digital Power
— AG: Analog Ground
— DG: Digital Ground
5
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