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74ALVCH16374MTD

产品描述Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 6.10 MM, MO-153, TSSOP-48
产品类别逻辑    逻辑   
文件大小85KB,共7页
制造商Fairchild
官网地址http://www.fairchildsemi.com/
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74ALVCH16374MTD概述

Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 6.10 MM, MO-153, TSSOP-48

74ALVCH16374MTD规格参数

参数名称属性值
是否Rohs认证不符合
零件包装代码TSSOP
包装说明TSSOP,
针数48
Reach Compliance Codenot_compliant
系列ALVC/VCX/A
JESD-30 代码R-PDSO-G48
JESD-609代码e0
长度12.5 mm
逻辑集成电路类型BUS DRIVER
湿度敏感等级2
位数8
功能数量2
端口数量2
端子数量48
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd)7.8 ns
认证状态Not Qualified
座面最大高度1.2 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)1.65 V
标称供电电压 (Vsup)1.8 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Lead (Sn85Pb15)
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
宽度6.1 mm
Base Number Matches1

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74VCXH16374 Low Voltage 16-Bit D-Type Flip-Flop with Bushold
January 2000
Revised March 2000
74VCXH16374
Low Voltage 16-Bit D-Type Flip-Flop with Bushold
General Description
The VCXH16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and output enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
The VCXH16374 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74VCXH16374 is designed for low voltage (1.65V to
3.6V) V
CC
applications with output compatibility up to 3.6V.
The 74VCXH16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.65V–3.6V V
CC
supply operation
s
3.6V tolerant control inputs and outputs
s
Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s
t
PD
3.0 ns max for 3.0V to 3.6V V
CC
3.9 ns max for 2.3V to 2.7V V
CC
7.8 ns max for 1.65V to 1.95V V
CC
s
Static Drive (I
OH
/I
OL
)
±24
mA @ 3.0V V
CC
±18
mA @ 2.3V V
CC
±6
mA @ 1.65V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Order Number
74VCXH16374MTD
Package
Number
MTD48
Package Descriptions
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OE
n
CP
n
I
0
–I
15
O
0
–O
15
Description
Output Enable Input (Active LOW)
Clock Pulse Input
Bushold Inputs
Outputs
© 2000 Fairchild Semiconductor Corporation
DS500228
www.fairchildsemi.com

 
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