Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
At T
A
= 25
o
C, V
CC
= 10V, V
BIAS
= 3.75V, V
V
(Pin 8) = V
H
(Pin 10) = 6.0V, S
1
= A, S
2
= A,
See Test Circuit and Timing Diagrams
PARAMETER
Supply Current
Reference Voltage
Input Current
Output Current
Source
Sink
Output Buffer
Input Current
Voltage Gain
Transconductance
17,19, 21
17,19, 21
TEST PIN NO. SYMBOL
22
2, 4, 6
2, 4, 6
17,19, 21
I
CC
V
REF
I
I
l
OM
+
l
OM
-
I
I
A
V
g
M
V
OL
V
OH
l
OM
-
11
V
OL
V
OH
12
V
OL
V
OH
8
10
13
V
V
V
H
Measure at t
4
V
IN
= 7.2V, S
1
= B
V
BIAS
= 0.5V, Measure at t
6
, S
1
= B
V
BIAS
= 7.0V, Measure at t
6
, S
1
= B
V
OUT
= 6.5V, V
IN
At pins 16, 18, 20,
Measure at t
4
, S
1
= B
Measure at t
6
, V
IN
= 8mV
P-P
at 40kHz, S
1
= B
Measure at t
1
Measure at t
4
Measure at t
4
, S
2
= B
Measure at t
4
Measure at t
1
Measure at t
6
Measure at t
1
See Figure 3
See Figure 3
t
0
to t
2
, Note 2
t
0
to t
7
, Note 2
11
t
0
to t
3
, Note 2
t
0
to t
5
, Note 2
12
t
0
to t
5
, Note 2
t
0
to t
7
, Note 2
TEST CONDITIONS
MIN
-
5.6
-
-
0.8
-
0.97
50
TYP
-
6.0
-
-
-
-
-
-
MAX
65
6.4
250
-0.8
-
150
1.07
100
UNITS
mA
V
nA
mA
mA
nA
-
mS
Auto Bias Pulse
Output Low
High
Current Sink
13
-
6.05
2.5
-
4.2
-
8.2
-
-
835
1270
899
1080
1080
1270
-
-
-
-
-
-
-
6.0
6.0
-
-
-
-
-
-
0.3
-
-
0.4
-
0.4
-
-
-
842
1275
905
1084
1084
1275
V
V
mA
V
V
V
V
V
V
µs
µs
µs
µs
µs
µs
Grid Pulse Output
Low
High
Program Pulse Output
Low
High
Vertical Input
Horizontal Input
Auto Bias Pulse Timing Start
Finish
Grid Pulse Timing
Start
Finish
Program Pulse Timing
Start
Finish
NOTE:
2. All time measurements are made from 50% point to 50% point.
2
CA3224E
Test Circuit
+10V
3.65K
1
V
IN1
2
22
B
21
S
1
3
0.047
µF
V
IN2
4
19
S
1
5
0.047
µF
V
IN3
6
17
S
1
CA3224E
7
VERTICAL
INPUT
0.047
µF
8
16
15
18
B
A
20
B
A
A
0.12µF
V
BIAS
output goes high. This is used to set the RGB drive of the
companion chroma/luma circuit to black level. The auto-bias
pulse stays high for 7 horizontal periods during the auto-bias
cycle.
On the 15th horizontal sync pulse, the internal logic initiates the
setup interval. During the setup interval, the cathode current is
increased to a reference value (A in Figure 5) through the
action of the grid pulse. The cathode current causes a voltage
drop across R
S
. This voltage drop, together with the program
pulse output results in a reference voltage at V
S
(summing
point) which causes capacitor C
1
to charge to a voltage
proportional to the reference cathode current. The setup
interval lasts for 3 horizontal periods.
On the 18th horizontal sync pulse the grid pulse output
goes high, which through the grid pulse amplifier/inverter,
causes the cathode current to decrease. The decrease in
cathode current results in a positive recovered voltage
pulse with respect to the setup reference level at the VS
summing point. The positive recovered voltage pulse is
summed with a negative voltage pulse caused by the
program pulse output going low (cutting off Diode D1 and
switching in resistors R1 and R2). Any difference between
the positive and negative pulses is fed through capacitor
C1 to the transconductance amplifier. The difference signal
is amplified in the transconductance amplifier and charges
the hold capacitor C2, which, through the buffer amplifier,
adjusts the bias on the driver circuit.
Components RS, R1, and R2 must be chosen such that the
program pulse and the recovered pulse just cancel at the
desired cathode cutoff level.
V
OUT1
3.65K
0.12µF
V
OUT2
3.65K
0.12µF
47µF
+
V
OUT3
9
14
+20V
3.32K
1.50K
1.0K
B
+10V
HORIZONTAL
INPUT
10
11
13
20K
12
S
2
A
1.5K
Device Description and Operation
(See Figures
1, 2, 4 and 5)
During the vertical retrace interval, 13 horizontal sync pulses
are counted. On the 14th sync pulse the auto-bias pulse
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