Unidirectional TVS Array
for Protection of Six Lines
PROTECTION PRODUCTS
Description
The SMDA series of transient voltage suppressors are
designed to protect components which are connected
to data and transmission lines from voltage surges
caused by electrostatic discharge (ESD), electrical fast
transients (EFT), and lightning.
TVS diodes are characterized by their high surge
capability, low operating and clamping voltages, and
fast response time. This makes them ideal for use as
board level protection of sensitive semiconductor
components. The SMDA05-6 is designed to provide
transient suppression on multiple data lines and I/O
ports. It is designed to operate on 5V digital lines. The
low profile SO-8 design allows the user to protect up to
six data and I/O lines with one package.
The SMDA05-6 TVS diode array will meet the surge
requirements of IEC 61000-4-2 (Formerly IEC 801-2),
Level 4, “Human Body Model” for air and contact
discharge.
SMDA05-6
Features
300 watts peak pulse power (tp = 8/20µs)
Transient protection for data lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 12A (8/20µs)
Protects up to 6 unidirectional lines
Low operating voltage
Low clamping voltage
Solid-state silicon avalanche technology
Mechanical Characteristics
JEDEC SO-8 package
UL 497B listed
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tube or Tape and Reel per EIA 481
Applications
5V data and I/O lines
Communication lines
Microprocessor based equipment
LAN/WAN equipment
Servers
Notebook & Desktop PC
Instrumentation
Peripherals
Circuit Diagram
Schematic & PIN Configuration
SO-8 (Top View)
Revision 01/29/03
1
www.semtech.com
SMDA05-6
PROTECTION PRODUCTS
Applications Information
Device Connection for Protection of Six Data Lines
The SMDA05-6 is designed to protect up to 6 data or
I/O lines operating at 5 volts. They are unidirectional
devices and may be used on lines where the signal
polarities are above ground (i.e. 0 to 5V).
The device is connected as follows:
Pins 1, 2, 3, 4, 5 and 8 are connected to the lines
that are to be protected. Pins 6 and 7 are con-
nected to ground. The ground connections should
be made directly to the ground plane for best
results. The path length is kept as short as pos-
sible to reduce the effects of parasitic inductance
in the board traces.
Connection Diagram
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
Place the TVS near the input terminals or connec-
tors to restrict transient coupling.
Minimize the path length between the TVS and the
protected line.
Minimize all conductive loops including power and
ground loops.
The ESD transient return path to ground should be
kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible.
DATA IN
DATA OUT
Circuit Diagram
8
7
6
5
1
2
3
4
DATA IN
DATA OUT
2003 Semtech Corp.
4
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