Si3226/7
Si3208/9
D
U A L
P
R O
SLI C
®
W I T H
DC-DC C
O N T R O L L E R
Features
Performs all BORSCHT functions
Ideal for short- or long-loop applications
Internal balanced or unbalanced ringing
Low power consumption
Software-programmable parameters:
Ringing frequency, amplitude,
cadence, and waveshape
Two-wire ac impedance
Transhybrid balance
DC current loop feed (10–45 mA)
Loop closure and ring trip thresholds
Ground key detect threshold
Integrated dc-dc controller
Wideband CODEC (Si3227)
Low-power sleep mode
On-hook transmission
Loop or ground start operation
Smooth polarity reversal
DTMF generator/decoder
A-Law/µ-Law companding,
linear PCM
PCM and SPI bus digital interfaces
with programmable interrupts
GCI/IOM-2 mode support
3.3 V operation
GR-909 loop diagnostics
Audio diagnostics with loopback
Pb-free/RoHS-compliant packaging
Applications
Customer Premises Equipment (CPE)
Optical Network Terminals (ONT)
Private Branch Exchange (PBX)
Cable EMTAs, ATAs, VoIP
Gateways
Ordering Information
See page 33.
Patents pending
Description
The Dual ProSLIC
®
is a family of low-voltage CMOS devices that integrate both
SLIC and CODEC functionality into a single IC. In combination with a linefeed IC
(LFIC), they provide a complete two-channel analog telephone interface in
accordance with all relevant LSSGR, ITU, and ETSI specifications. The Dual
ProSLIC devices (Si3226/7) operate from a single 3.3 V supply and interface to
standard PCM/SPI or GCI bus digital interfaces. The LFICs (Si3208/9) perform all
high-voltage functions and operate from a 3.3 V supply as well as high-voltage
battery supplies. The Si3208 is rated for –110 V, and the Si3209 is rated for –
135 V. The Dual ProSLIC devices are available in a 64-pin thin quad flat package
(TQFP), and the LFICs are available in a 40-pin, quad flat no-lead package
(QFN).
Functional Block Diagram
Si3226/7
Si3226
DTMF &
Tone Gen
Caller ID
SPI
Control
Interface
Ringing
Generator
Programmable
Programmable
AC Impedance
AC Impedance
and Hybrid
FSYNC
DRX
DTX
CS
SDI
SDO
SCLK
INT
RST
Si3206
Si3208/9
CODEC
ADC
DAC
CODEC
ADC
DAC
SLIC
Linefeed
Linefeed
Control
Linefeed
Monitor
PCM/
GCI
Interface
TIP
Channel 1
RING
DSP
SLIC
Linefeed
Linefeed
Control
Linefeed
Monitor
Line Diagnostics
PLL
DC-DC Controllers
DC-DC Controller
VBAT
VDC
DC-DC BOM
TIP
Channel 2
RING
PCLK
Preliminary Rev. 0.33 6/07
Copyright © 2007 by Silicon Laboratories
Si3226/7 Si3208/9
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si3226/7
Si3208/9
2
Preliminary Rev. 0.33
Si3226/7
Si3208/9
T
A B L E O F
C
O N T E N TS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1. DC Feed Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.2. Linefeed Operating States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.3. Line Voltage and Current Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.4. Power Monitoring and Power Fault Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.5. Thermal Overload Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.6. Power Dissipation Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4.7. Loop Closure Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.8. Ground Key Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.9. Ringing Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.10. Polarity Reversal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.11. Two-Wire Impedance Synthesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.12. Transhybrid Balance Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.13. Tone Generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.14. DTMF Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.15. DC-DC Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.16. Wideband Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.17. SPI Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.18. PCM Interface and Companding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.19. General Circuit Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.20. Metallic Loop Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5. Pin Descriptions: Si3226/7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6. Pin Descriptions: Si3208/9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8. Package Outline: 64-Pin TQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
9. Package Outline: 40-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Preliminary Rev. 0.33
3
Si3226/7
Si3208/9
1. Electrical Specifications
Table 1. Absolute Maximum Ratings and Thermal Information
1
Parameter
Operating Temperature Range
Storage Temperature Range
Thermal Resistance,
TQFP-64
Typical
2
Symbol
T
A
T
STG
θ
JA
P
D
θ
JA
P
D
Si3226/7
Supply Voltage
Digital Input Voltage
Supply Voltage
Battery Supply Voltage
5
TIP, RING Current
Supply Voltage
High Battery Supply Voltage
5
TIP, RING Current
V
DD1 –
V
DD4
V
IND
Si3208
V
DD
V
BAT
I
TIP
, I
RING
Si3209
V
DD
V
BAT
I
TIP
, I
RING
Continuous
Pulse < 10 µs
–0.5 to 4.0
+0.4 to –135
+0.4 to –143
±100
V
V
V
mA
Continuous
Pulse < 10 µs
–0.5 to 4.0
+0.4 to –110
+0.4 to –118
±100
V
V
V
mA
–0.5 to 4.0
–0.3 to 3.6
V
V
T
A
= 85 °C
T
A
= 85 °C
Test Condition
Value
–40 to 85
–55 to 150
25
1.6
32
1.7
Unit
°C
°C
°C/W
W
°C/W
W
Continuous Power Dissipation
3
TQFP-64
Thermal Resistance, Typical
2
QFN-40
Continuous Power Dissipation
4
QFN-40
Notes:
1.
Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be
restricted to the conditions as specified in the operational sections of this data sheet.
2.
The thermal resistance of an exposed pad package is assured when the recommended printed circuit board layout
guidelines are followed correctly. The specified performance requires that the exposed pad be soldered to an exposed
copper surface of at least equal size and that multiple vias are added to enable heat transfer between the top-side
copper surface and a large internal/bottom copper plane.
3.
Operation of the Si3226 or Si3227 above 125 °C junction temperature may degrade device reliability.
4.
Si3208 and Si3209 are equipped with on-chip thermal limiting circuitry that shuts down the circuit when the junction
temperature exceeds the thermal shutdown threshold. The thermal shutdown threshold should normally be set to 145
°C; when in the ringing state the thermal shutdown may be set to 200 °C. For optimal reliability long term operation of
the Si3208/Si3209 above 150 °C junction temperature should be avoided.
5.
The dv/dt of the voltage applied to the VBAT pins must be limited to 10 V/µs.
4
Preliminary Rev. 0.33
Si3226/7
Si3208/9
Table 2. Recommended Operating Conditions
Parameter
Ambient Temperature
Ambient Temperature
Supply Voltage, Si3226/7
Supply Voltage, Si3208/Si3209
Battery Voltage, Si3208
Battery Voltage, Si3209
Symbol
T
A
T
A
V
DD1
–V
DD4
V
DD
V
BAT
V
BAT
Test
Condition
F-grade
G-grade
Min*
0
–40
3.13
3.13
–9
–9
Typ
25
25
3.3
3.3
—
—
Max*
70
85
3.47
3.47
–110
–135
Unit
o
C
o
C
V
V
V
V
*Note:
All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions.
Typical values apply at nominal supply voltages and an operating temperature of 25
°
C unless otherwise stated.
Table 3. 3.3 V Power Supply Characteristics
1
(V
DD
= 3.3 V, T
A
= 0 to 70 ºC for F-Grade, –40 to 85 ºC for G-Grade)
Parameter
High Impedance,
Reset
High Impedance,
Open Current
Forward/Reverse Sleep,
On-hook Current
Forward/Reverse Active,
On-hook Current
Forward/Reverse Active,
Off-hook Current
Forward/Reverse OHT,
On-hook Current
Tip/Ring Open,
On-hook Current
Ringing Current
Symbol
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
Test Condition
V
T
and V
R
= Hi-Z
RST = 0
V
T
and V
R
= Hi-Z
V
TR
= –48 V
V
TR
= –48 V
I
LOOP
= 30 mA
R
LOAD
= 50
Ω
V
TR
= –48 V
V
T
or V
R
= –48 V
V
R
or V
T
= Hi-Z
V
TR
= 55 V
RMS
+ 0 V
DC
balanced, sinusoidal, f = 20 Hz
R
LOAD
= 5 REN = 1400
Ω
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
2.4
0
9.7
0.6
15
1.2
24
1.2
43
3.1 + I
LOOP
43
1.6
23
0.6
26
2.3 + I
AVE
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Notes:
1.
All specifications are for a single channel of Si3226/7 using Si3208/9 linefeed IC and based on measurements with all
channels in the same operating state.
2.
I
LOOP
is the dc current in the subscriber loop during the off-hook state.
3.
I
AVE
is the average of the full-wave rectified current in the subscriber loop during ringing (I
AVE
= I
PEAK
x 2/π).
Preliminary Rev. 0.33
5
stm32/stm8
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