MIL-STD-1553 PMC Card
MODEL: BU-65565
www.ddc-web.com
FEATURES
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Complete Off-the-Shelf Solution for Embedded MIL-STD-1553
Designed for Harsh Environments
Most Autonomous BC Architecture
Remote Terminal Flexibility
True Message Monitor
Autonomous Built-In Self-Test
FREE Supporting Software
Applications
- Mission Computers
- Flight Computers
- Communication Links
- Spacecraft
- Ground Vehicles
DESCRIPTION
The BU-65565 PCI Mezzanine (PMC) card offers a comprehensive COTS solution for interfacing between
embedded PCI and MIL-STD-1553 buses. The conduction cooled version, built to VITA-20 specifications,
features a conformally coated robust design with thermal vias, a heat spreading plane, and copper strips
providing a thermal interface to baseboard rails. The card has passed extensive shock and vibration testing.
The BU-65565 is also available as a convection-cooled card, with a choice of rear-panel, front-panel, or
rear- and front-panel input/output.
The BU-65565 includes one to four channels of DDC's field-proven, industry standard Enhanced Mini-ACE™.
This advanced bus controller architecture provides a high degree of flexibility and autonomy: improving
message scheduling control; minimizing host overhead for
asynchronous message insertion; and facilitating bulk data
transfers and double buffering, message retry and bus switch-
ing strategies, and data logging and fault reporting. In addi-
tion, the PMC card's remote terminal architecture meets all
common MIL-STD-1553 protocols. RT data buffering and inter-
rupt options offer robust support for synchronous and asynchro-
nous
messaging while ensuring data sample consistency and sup-
porting bulk data transfers.
Free BU-69090 software with a library supports all modes of
operation, VxWorks®, Linux®, Integrity®, and Windows® device
drivers (including source code), and an offline development
BU-65565 Block Diagram
Figure 1
PMC
P
n
4
Connector
AD31-AD0
PCI Address/Data,
Parity, and
Bus Command/Byte
Enable
PAR
C/BE[3]# - C/BE[0]#
33 MHz,
32-Bit
PCI Target
Interface
BU-61864
Enhanced
Mini-ACE
1553
BUS A
RTAD4-0, RTADP, EXT_TRIG/SSFLAG
FRAME#, IRDY#,
IDSEL, RST#
BU-61864
Enhanced
Mini-ACE
A15-A0
D15-D0
Control
BU-61864
Enhanced
Mini-ACE
1553
BUS B
RTAD4-0, RTADP, EXT_TRIG/SSFLAG
PCI Bus
PCI Control
TRDY#, STOP#,
DEVSEL#, PERR#, SERR#
1553
BUS C
RTAD4-0, RTADP, EXT_TRIG/SSFLAG
PCI Clock
CLK
PCI Interrupt
Request
INTA#
PCI
Configuration
Registers
BU-61864
Enhanced
Mini-ACE
1553
BUS D
RTAD4-0, RTADP, EXT_TRIG/SSFLAG
Complete Off-the-Shelf Solution for Embedded
MIL-STD-1553
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Conduction or Convection Cooled PMC Card
One to Four MIL-STD-1553 Channels
FREE Library and VxWorks
®
Software Available
Each Channel Individually Programmable as BC, RT,
Monitor, or RT/Monitor
64K X 17 RAM Per Channel
- PCI Interface
- 33 MHz, 32-bit
- Target Interface
- 5V and 3.3V-Powered (5V-only Option)
Operates in 3.3V or 5V PCI Signaling Environments
PCI Local Bus Specification Revision 2.2
Transformer Coupled 1553 I/O
Option for Direct Coupling
Remote Terminal Flexibility
- Compatibility with ACE and Mini-ACE Applications
- Multiprotocol: MIL-STD-1553A/B, STANAG-3838
- Choice of Subaddress Single Message, Double Buffering,
or Circular Buffering; or Global Circular Buffering
- 50% and 100% Circular Buffer Rollover Interrupts
- Stack with Descriptors for Individual Messages
- Message Status, Time Tag, Command Word,
Data Pointer
- Hardware (via connector) or Software-Programmable
RT Address
- Programmable Command Illegalization
- Programmable Busy by Subaddress
- Interrupts on All Messages, or Individual Subaddresses
and/or Mode Codes
- 32-Entry Interrupt Status Queue
- Available with Option for RT AUTO-BOOT with BUSY Bit Set
for MIL-STD-1760 Applications
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Designed for Extended Environments
- Conduction Cooled Version
- -55 to +85° C Temperature Range
- Constructed in Accordance with VITA-20
- Rear-Panel I/O
- Thermal Vias under Hottest Chips (transceivers)
- Convection Cooled Versions
- 0 to +70° C Temperature Range
- Rear-Panel, Front-Panel, or Front and
Rear-Panel I/O Options
- Shock and Vibration Test Data Available
- Shock: Three Pulses, Half Sine on Six (6) Axes
- Vibration: Random Input, One Hour Each Axes
Three Hours Total, 15 to 2000 Hz
True Message Monitor
- Selective Message Monitor
- Filter Based on RT Address, T/R bit, Subaddress
- True Message Monitor
- Command Stack
- Message Status, Time Tag, Command Word,
Data Pointer
Data Stack
- All Monitored Words Following (first) Command Word
50% and 100% Rollover Interrupts for Command and
Data Stacks
32-Entry Interrupt Status Queue
Simultaneous RT/Message Monitor Option
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Most Autonomous BC Architecture
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Built-in Message Sequence Control Engine
Defined Set of 20 Instructions
Control/Status Blocks for Individual Messages
Minor and Major Frame Scheduling
Asynchronous Message Insertion
Conditional Branching and Subroutines
General Purpose Queue: Message Status, Time Tag,
Immediate Data, Indirect Data
- Fully User-definable Interrupts
- Legacy Mode for Compatibility with ACE and
Mini-ACE Applications
Autonomous Built-In Self-Test
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Protocol Self-Test
RAM Self-Test
Online Loopback Test
Capability for CH. A-to-CH. B Wraparound Test
Capability to Test Transmitter Timeout Function
Data Device Corporation
www.ddc-web.com
BU-65565
REV 3 - 04/06 - WEB
FREE Supporting Software
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Complete BU-69090 Library
VxWorks, Linux, Integrity, and Windows Drivers
High-Level Register/Memory Initialization Routines
For All Modes, Creation of Consolidated Status + Data
Structures for Individual Messages in Host Memory
Memory Management Software
Open/Access/Close Model
Memory Allocation Performed Transparent to
Application Program
Management of Data Structures in Card RAM and
Host Memory
- BC Software
- Supports Full Use of BC Instruction Set
- Manages Creation of Data Blocks
- Creates BC Messages
- Create and Start BC Frames
- Creation of Message Control/Status Blocks
- RT Software
- Allocates RT Data Blocks
- Map Data Blocks to Subaddresses
- Command Illegalization
- Read Consolidated Message Structures From
Host Buffers
- Initialize and Manage Circular Buffers
- Monitor Software
- Enable Monitor Filtering for Specified Address/
T-R/Subaddresses
- Copy Monitored Messages Into Consolidated
Structures in Host Buffers
- Read Last Unread Message From Host Buffer
- Read Most Recent Message From Host Buffer
- VxWorks Driver
- Designed for Version 5.2 of Wind River's VxWorks
- For Power PC, Developed Using 750 Processor
- Version for Intel Pentium Platform Available
- Source Code Available
- Support of Offline Development Environment
- Allows Development on Desktop PC
- Generates Binary Image and 'C' Header Files
- Results in Reduced Embedded Code Size
- Reduced Computational Resources
- Reduces Software Validation and Documentation
Offline Development (Software) Environment
Figure 2
Data Device Corporation
www.ddc-web.com
BU-65565
REV 3 - 04/06 - WEB
Specifications
PARAMETER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
+3.3V
+5V
POWER SUPPLY REQUIREMENTS
Voltages/Tolerance
+3.3 V (logic power)
+5 V (RAM and
transceiver power)
Current Drain (Total Hybrid)
BU-65565X1
+5 V
0% Transmit/Monitor
75% Duty Transmitter Cycle
+3.3 V (Logic)
BU-65565X2
+5 V
0% Transmit/Monitor
75% Duty Transmitter Cycle
+3.3 V (Logic)
BU-65565X3
+5 V
0% Transmit/Monitor
75% Duty Transmitter Cycle
+3.3 V (Logic)
BU-65565X4
+5 V
0% Transmit/Monitor
75% Duty Transmitter Cycle
+3.3 V (Logic)
MIN TYP
MAX UNITS
PARAMETER
THERMAL
Operating Temperature
BU-65565MX
(measured at thermal interface)
BU-65565C/F/BX
(measured at component case)
Operating Junction Temperature
Storage Temperature
Thermal Resistance,
Junction to Thermal Interface
(BU-65565MX)
MIN TYP
MAX UNITS
-0.3
-0.3
4.6
6.0
V
V
-55
0
-55
-65
85
70
160
160
39
°C
°C
°C
°C
°C/W
3.0
4.75
3.3
5.0
3.6
5.25
V
V
100
430
80
200
860
120
300
1.29
160
400
1.72
200
mA
mA
mA
mA
A
mA
mA
A
mA
mA
A
mA
MECHANICAL DESIGN
Shock: Three pulses, half sine on six (6) axes
40g’s, 11 msec/axes
Vibration: Random input, one hour each axes, 14g’s rms
three hours total, 15 to 2000 Hz
Resonant Frequency: BU-65565M2 (calculated) 12 Hz
PHYSICAL CHARACTERISTICS
Size
Weight
BU-65565X1
BU-65565X2
BU-65565X3
BU-65565X4
5.87 X 2.91
149 X 74
2.7
3.3
3.9
4.5
(76.5)
(93.56)
(110.6)
(127.6)
in.
mm
oz. (g)
oz. (g)
oz. (g)
oz. (g)
Ordering Information
BU-65565 X X - X00X
(blank) = No Conformal Coating
N = Conformal Coating (See Note)
Temperature Range
3 = 0°C to +70°C (Convection cooling method only)
9 = -55°C to +85°C (Convection cooling method only)
Number of Channels
1 = 1 Dual Redundant
2 = 2 Dual Redundant
3 = 3 Dual Redundant
4 = 4 Dual Redundant
1553
1553
1553
1553
Channel
Channels
Channels
Channels
Cooling Method
F = Convection Cooled, Front Panel I/O
C = Convection Cooled, Rear Panel I/O
B = Convection Cooled, Front and Rear Panel I/O
M = Conduction Cooled Conformally Coated with “Humiseal 1A33,” Rear Panel I/O
Base Product
BU-65565 = MIL-STD-1553 PMC Card
Notes: 1. For BU-65565MX, conformal coating is standard and this digit should be blank. For BU-65565CX, BU-65565FX, or BU-65565BX, conformal
coating is optional and this digit can be either blank or “N”>.
2. These products contain tin-lead solder.
The information in this product brief is believed to be accurate; however,
no responsibility is assumed by Data Device Corporation for its use,
and no license or rights are granted by implication or otherwise in
connection therewith. Specifications are subject to change without notice.
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Call DDC or visit www.ddc-web.com for a quote today:
®
ST
ERED
105 Wilbur Place, Bohemia, New York, U.S.A. 11716-2482
For Technical Support - 1-800-DDC-5757 ext. 7771
Headquarters, N.Y., U.S.A. -
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Tel: (714) 895-9777, Fax: (714) 895-4988
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REV 3 - 04/06 - WEB
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REGISTERED TO ISO 9001:2000
FILE NO. A5976
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