CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
DD
= 5V, V
SS
= -5V, R
L
Open, Over Temperature Range; Unless Otherwise Specified. Designed for
±5%
Power Supply.
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
OVERALL
Supply Currents
I
DD
I
SS
I
CC
V
DD
(Note 2)
V
SS
(Note 3)
V
CC
Quiescent, No Load
-
-
-
-
66
-79
0
725
-
-
-
-
mA
mA
µA
mW
Power Dissipation
DIGITAL INTERFACE
Input Voltage Thresholds
PD
V
IL
V
IH
-
2.7
V
IN
= 0V
V
IN
= V
DD
-10.0
-10.0
0.1
T1/2 -10
-
T1 - 10
T1/2 -5
-
-
-
-
0
0
-
-
-
-
-
-
-
0.8
-
10.0
10.0
5.0
-
10
T1 +10
T1/2 +5
100
100
V
V
µA
µA
µs
ns
ns
ns
ns
ns
ns
Input Currents
I
IL
I
IH
Serial Clock Period
CS Active Before Shift Edge
Write Data Valid After Shift
Edge
CS Inactive After Latch Edge
Write Data Hold After Latch
Edge
DAC Setup Time
DAC Hold Time
14-BIT DAC
Resolution/Monotonicity
Integral Linearity
Differential Linearity
Max Sample Rate
TRANSMITTER OUTPUT
Output Drive
Differential Output Swing
Differential Balance
Transmit Output Offset
Multi-Tone Power Ratio
Power Supply Rejection
T1
T2
T3
T4
T5
t
S
t
H
14
I
LE
D
LE
Measured at T
X
Outputs
-
-
4.416
-
±1.5
±0.9
-
-
-
-
-
Bits
LSB
LSB
Ms/s
TXOD
TXOS
TXDB
TXOFF
TXMTPR
PSRR
Sink or Source
R
L
= 220Ω
Gain Match Between Outputs
Max Gain Single Ended (Note 4)
R
L
= 220Ω
Input Referred - V
DD
Input Referred - V
SS
30
11.7
-
-200
-
40
55
55
12.03
0.5
25
65
65
84
-
12.3
-
200
-
-
-
mA
V
PP
%
mV
dB
dB
dB
3
HC6094
Electrical Specifications
V
DD
= 5V, V
SS
= -5V, R
L
Open, Over Temperature Range; Unless Otherwise Specified. Designed for
±5%
Power Supply.
(Continued)
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
TRANSMITTER GAIN STAGE
Gain Error
TXPG
R
L
= 220Ω, 0dB Setting
R
L
= 220Ω, Each Step Relative to 0dB
-0.22
-0.15
+0.02
0.02
0.22
0.15
dB
dB
TRANSMITTER FREQUENCY RESPONSE
Gain Ripple Peak to Peak
Stopband Attenuation
Floor Attenuation
GP
GS
GM
Across 1.104MHz Bandwidth
At 2.65MHz
At 9.94MHz
-
14
-
0.2
17
58
0.6
-
-
dB
dB
dB
RECEIVER INPUT (PGA1 AND PGA2)
Input Swing
Input Impedance
RXIS
RXRIN
Differential
PGA1
PGA2
Common Mode Rejection
Common Mode Range
Continuous Input Voltage
RECEIVER OUTPUT (INCLUDING PGA1 OUT)
Differential Output Swing
RXOS
RX
OUT
(R
L
= 2000Ω)
PGA1
OUT
(R
L
= 2000Ω)
Differential Balance
PGA1 Output Offset
PGA2 Output Offset
Multi-Tone Power Ratio
Power Supply Rejection
RXDB
RXOFF
RXOFF
RXMTPR
PSRR
End to End (RX
IN
to RX
OUT
)
Max Gain Single Ended (Note 4)
Max Gain Single Ended (Note 4)
R
L
= 2000Ω
Input Referred - V
DD
Input Referred - V
SS
RECEIVER GAIN STAGE
Absolute Gain Error
RXPG
Any Step (RX
IN
to RX
OUT
)
-0.3
0.01
0.3
dB
12.0
12.0
-
-200
-200
-
45
55
15.8
16.0
0.5
40
30
65
69
84
-
-
-
200
200
-
-
-
V
PP
V
PP
%
mV
mV
dB
dB
dB
RXCMRR
RXCMIR
1.1MHz
-
1.0
1.0
-
-0.25
V
SS
-0.5
12
90
-
-
12
-
-
-
0.25
V
DD
+0.5
V
PP
MΩ
kΩ
dB
V
V
RECEIVER FREQUENCY RESPONSE
Gain Ripple Peak to Peak
Stopband Attenuation
Floor Attenuation
GP
GS
GM
Across 1.104MHz Bandwidth
At 2.65MHz
At 9.94MHz
-
14
-
0.4
19.4
53
0.6
-
-
dB
dB
dB
TRANSMITTER AND RECEIVER FILTER CUTOFF FREQUENCY
TX Filter F
C
RX Filter F
C
NOTES:
2. V
DD
= 5V typical, supply range
±5%.
3. V
SS
= -5V typical, supply range
±5%.
4. Single ended operation for reference only. Probed to these limits, but not packaged tested.
TX
FC
RX
FC
-0.15dB point
-0.15dB point
1.104
1.104
1.18
1.125
1.25
1.16
MHz
MHz
4
HC6094
Definitions
1. Supply currents/power dissipation measured in a quiescent (static) state with R
L
open.
2. Logic input levels and timing are verified by using them as conditions for testing DAC and filter.
3. Digital input currents are measured at 0V and V
CC
.
4. DAC resolution and monotonicity guaranteed by ILE and DLE tests.
5. DAC ILE is relative to best fit straight line.
6. Output drive current is the output current at 0V for each output when they are driven to
±
Full Scale.
7. Output offset measured with V
IN
= 0V differential for the R
X
, and the DAC at mid scale for the T
X
.
8. PSRR is the change in differential input voltage vs. change in supply voltage at DC.
9. T
X
Gain is calculated as 20*Log((TXout
DACFS
- TXout
DACZS
)/12V) at DC.
10. R
X
input swing is verified by using this as condition for gain testing.
11. R
X
Input Impedance is calculated as
∆
VIN/
∆
IIN where VIN is the maximum input voltages, with the PGA set to 0dB.
12. R
X
CMRR is calculated as 20*Log(V
OUT
/V
IN
)-PGA Gain. V
IN
is set to 250mV
PEAK
(CMIR) at 1.1MHz, and PGA gain is
set to maximum.
13. R
X
Gain is calculated as 20*Log(dV
OUT
/dV
IN
), where V
IN
is set to give a nominal
±
Output Swing, or the maximum input
swing, whichever is smaller. It is tested DC.
14. Filter Gain/Attenuation is relative to low frequency passband gain. T
X
tested by driving the DAC (with sinX/X correction),
R
X
tested by driving PGA2. Wafer probe will use special test points to bypass the DAC for laser trimming.
15. MTPR - (Multi-Tone Power Ratio). A DMT waveform is generated which has a specific crest factor or peak to average ratio
(PAR) with specific carriers missing. The waveform is then passed through the T
X
or R
X
chain. The total integrated power
of the notch at the location of the missing carriers is measured with respect to the adjacent carriers. Notch depth is mea-
sured for several DMT waveforms with different PARs. The notch depths for each DMT waveform are averaged to give an
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