HY62KF16403E Series
256Kx16bit full CMOS SRAM
Document Title
256K x 16bit 2.7 ~ 3.6V Super low Power FCMOS Slow SRAM
Revision History
Revision No.
0.0
0.1
Initial Draft
Absolute Maximum Ratings
- Vcc changed -0.3V to 4.6V -> -0.3V to 4.0V
DC Electric Characteristics
- ICC changed 4mA -> 3mA
- ICC1 changed 25mA at 55ns -> 20mA at 55ns
- ICC1 changed 20mA at 70ns -> 15mA at 70ns
- ICC1 changed 3mA at 1us -> 2mA at 1us
AC Test Conditions
- Output Load changed 5pF -> 30pF
Data Retention Electric Characteristics
- ICCDR changed 10uA -> 6uA
Marking Information
- Part Name changed HY62KF6403E
-> HY62KF16403E
0.2
Add 44-Pin Padpitch to TSOPII Package Information
Dec.26.2003
Final
History
Draft Date
Dec.26.2001
Nov.14.2002
Remark
Preliminary
Final
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 0.2 / Dec. 2003
1
HY62KF16403E Series
256Kx16bit full CMOS SRAM
DESCRIPTION
The HY62KF16403E is a high speed, super low power and 4Mbit full CMOS SRAM organized as 256K words by 16bits.
The HY62KF16403E uses high performance full CMOS process technology and is designed for high speed and low power
circuit technology. It is particularly well-suited for the high density low power system application.
This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 1.2V.
FEATURES
●
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Battery backup
- 1.2V(min) data retention
●
●
●
Standard pin configuration
- 44pin 400mil TSOP-II (Forward)
16M Pseudo SRAM PRODUCT FAMILY
Operation
Current/Icc
3mA
Standby Current
SL
6uA
LL
15uA
Part Number
HY62KF16403E-I
Voltage
2.7~3.6 (V)
Speed
55/70 (ns)
Temp.(
o
C)
-40 ~ 85
Note 1) I : Industrial Temperature.
2) Current value is max.
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 0.2 / Dec. 2003
2
HY62KF16403E Series
256Kx16bit full CMOS SRAM
PIN CONNECTION
A4
A3
A2
A1
A0
CS
I/O1
I/O2
I/O3
I/O4
Vss
Vcc
I/O5
I/O6
I/O7
I/O8
WE
A17
A16
A15
A14
A13
1
44
12
13
TSOPII
(Forward)
33
32
22
23
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O13
Vss
Vcc
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
A12
PAD DESCRIPTION
SYMBOL
CS
WE
OE
LB
UB
I/O1 ~ I/O16
A0 ~ A17
V
DD
V
SS
NC
DESCRIPTION
Chip Select
Write Enable
Output Enable
Lower Byte Control (IO1~IO8)
Upper Byte Control (IO9~IO16)
Data Inputs/Outputs
Address Inputs
Power(2.7V~3.6V)
Ground
No connection
Rev 0.2 / Dec. 2003
3
HY62KF16403E Series
256Kx16bit full CMOS SRAM
FUNCTIONAL BLOCK DIAGRAM
256K x 16bit Super low Power FCMOS Slow SRAM
ROW
A0
DECODER
SENSE AMP
I/O1
COLUMN
DECODER
I/O8
DATA I/O
BUFFER
ADD INPUT
BUFFER
PRE DECODER
MEMORY
ARRAY
256K x 16
BLOCK
DECODER
WRITE DRIVER
I/O9
I/O16
A17
/ CS
/ OE
/ LB
/ UB
/ WE
Rev 0.2 / Dec. 2003
4
HY62KF16403E Series
256Kx16bit full CMOS SRAM
ORDERING INFORMATION
Part Number
HY62KF16403E-SD(I)
HY62KF16403E-DD(I)
Note 1) I : Industrial -40 ~ 85
o
C
Speed
55/70
55/70
Power
SL-Part
LL-Part
Temparature
I
1)
I
1)
Package
TSOP-II
TSOP-II
ABSOLUTE MAXIMUM RATING
1)
Parameter
Input/Output Voltage
Power Supply
Ambient Temperature
Storage Temperature
Power Dissipation
Ball Soldering Temperature & Time
Symbol
V
IN
, V
OUT
V
DD
T
A
T
STG
P
D
T
SOLDER
Rating
-0.3 to VCC+0.3V
-0.3 to 4.0
-40 to 85
-55 to 150
1.0
260
.
10
Unit
V
V
o
C
o
C
W
o
C
.
Sec
Note1) Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is
stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation
of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
MODE
Deselected
Output Disabled
CS
H
L
L
L
WE
X
X
H
H
OE
X
X
H
L
LB
X
H
X
L
Read
H
L
L
Write
L
L
X
H
L
UB
X
H
X
H
L
L
H
L
L
I/O
I/O1 ~ I/O8
High-Z
High-Z
High-Z
D
OUT
High-Z
D
OUT
D
IN
High-Z
D
IN
I/O9 ~ I/O16
High-Z
High-Z
High-Z
High-Z
D
OUT
D
OUT
High-Z
D
IN
D
IN
Active
Active
POWER
Standby
Active
Note 1). H=V
IH
, L=V
IL
, X=Don
'
t Care(V
IL
or V
IH
)
2). UB, LB(Upper, Lower Byte enable)
These active LOW inputs allow individual bytes to be written or read.
When LB is LOW, data is written or read to the lower byte, I/O1 - I/O8.
When UB is LOW, data is written or read to the upper byte, I/O9 - I/O16.
Rev 0.2 / Dec. 2003
5
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