Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-
state
resistance,
provide
superior
switching
performance, and withstand high energy pulses in the
avalanche and commutation modes. These devices
are particularly suited for low voltage applications such
as notebook computer power management and other
battery powered circuits where fast switching, low in-
line power loss, and resistance to transisents are
needed
.
Features
•
–2.9 A, –30 V, R
DS(ON)
= 130mΩ @ V
GS
= –10 V
•
High density cell design for extremely low R
DS(ON)
•
High power and current handling capability in a
widely used surface mount package.
•
Dual MOSFET in surface mount package.
D2
D
D2
D
D
D1
D1
D
5
6
7
Q1
4
3
2
Q2
SO-8
Pin 1
SO-8
G2
S2
S
G1
S1
G
S
8
1
S
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
T
A
=25
o
C unless otherwise noted
Parameter
Ratings
–30
±25
(Note 1a)
Units
V
V
A
W
±2.9
±10
2
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
1.6
1
0.9
–55 to +150
°C
T
J
, T
STG
Operating and Storage Junction Temperature Range
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
6953
Device
Si6953DQ
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
2001
Fairchild Semiconductor Corporation
Si6953DQ Rev A(W)
Si6953DQ
Electrical Characteristics
Symbol
Parameter
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
T
A
= 25°C unless otherwise noted
Test Conditions
V
GS
= 0 V, I
D
= –250
µA
I
D
= –250
µA,
Referenced to 25°C
V
DS
= –24 V,
V
GS
= –25 V,
V
GS
= 25 V,
V
GS
= 0 V
V
DS
= 0 V
V
DS
= 0 V
Min Typ
–30
–23
Max Units
V
mV/°C
–2
–100
100
µA
nA
nA
Off Characteristics
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
, I
D
= –250
µA
I
D
= –250
µA,
Referenced to 25°C
V
GS
= –10 V, I
D
= –1.0 A
V
GS
= –10 V, I
D
= –1.0 A, T
J
=125°C
V
GS
= –4.5 V, I
D
= –0.5 A
V
GS
= –4.5 V, I
D
= –0.5 A, T
J
=125°C
V
GS
= –10 V,
V
DS
= –5 V
V
GS
= –4.5 V,
V
DS
= –15 V,
V
DS
= –5 V
I
D
= –1 A
–1
–1.8
4
95
137
142
202
–2.8
V
mV/°C
130
210
200
320
mΩ
I
D(on)
g
FS
On–State Drain Current
Forward Transconductance
–10
–1.5
4
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
DS
= –15 V,
f = 1.0 MHz
V
GS
= 0 V,
185
56
26
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= –15 V,
V
GS
= –10 V,
I
D
= –1 A,
R
GEN
= 6
Ω
4.5
13
11
2
9
23
20
4
3.5
ns
ns
ns
ns
nC
nC
nC
V
DS
= –5 V,
V
GS
= –10 V
I
D
= –1 A,
2.5
0.8
0.9
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
t
rr
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
Reverse Recovery Time
V
GS
= 0 V,
I
S
= –1.3 A
(Note 2)
–1.2
–0.8
13
1.3
100
A
V
nS
V
GS
= 0 V, I
F
= –1.25A, dI
F
/dt =
100A/µs
Si6953DQ Rev A(W)
Si6953DQ
Typical Characteristics
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
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