a
Dual, Low Noise, Low Offset
Instrumentation Operational Amplifier
OP227
PIN CONNECTIONS
NULL (A)
NULL (A)
–IN (A)
+IN (A)
V– (B)
OUT (B)
V+ (B)
1
2
3
14
13
12
FEATURES
Excellent Individual Amplifier Parameters
Low V
OS
, 80 V Max
Offset Voltage Match, 80 V Max
Offset Voltage Match vs. Temperature, 1 V/ C Max
Stable V
OS
vs. Time, 1 V/M
O
Max
Low Voltage Noise, 3.9 nV/÷Hz Max
Fast, 2.8 V/ s Typ
High Gain, 1.8 Million Typ
High Channel Separation, 154 dB Typ
V+ (A)
OUT (A)
V– (A)
+IN (B)
–IN (B)
NULL (B)
NULL (B)
A
4
11
B
5
6
7
10
9
8
NOTE
1. DEVICE MAY BE OPERATED EVEN IF INSERTION
IS REVERSED; THIS IS DUE TO INHERENT SYMMETRY
OF PIN LOCATIONS OF AMPLIFIERS A AND B
2. V–(A) AND V–(B) ARE INTERNALLY CONNECTED VIA
SUBSTRATE RESISTANCE
GENERAL DESCRIPTION
The OP227 is the first dual amplifier to offer a combination of
low offset, low noise, high speed, and guaranteed amplifier matching
characteristics in one device. The OP227, with a V
OS
match of
25
mV
typical, a TCV
OS
match of 0.3
mV/∞C
typical and a 1/f corner
of only 2.7 Hz is an excellent choice for precision low noise designs.
These dc characteristics, coupled with a slew rate of 2.8 V/ms
typical and a small-signal bandwidth of 8 MHz typical, allow the
designer to achieve ac performance previously unattainable with
op amp based instrumentation designs.
When used in a three op amp instrumentation configuration, the
OP227 can achieve a CMRR in excess of 100 dB at 10 kHz. In
addition, this device has an open-loop gain of 1.5 M typical with
a 1 kW load. The OP227 also features an I
B
of
±
10 nA typical,
an I
OS
of 7 nA typical, and guaranteed matching of input currents
between amplifiers. These outstanding input current specifications
are realized through the use of a unique input current cancellation
circuit which typically holds I
B
and I
OS
to
±
20 nA and 15 nA
respectively over the full military temperature range.
Other sources of input referred errors, such as PSRR and CMRR,
are reduced by factors in excess of 120 dB for the individual
amplifiers. DC stability is assured by a long-term drift application
of 1.0
mV/month.
Matching between channels is provided on all critical param-
eters including offset voltage, tracking of offset voltage versus
temperature, noninverting bias current, CMRR, and power
supply rejection ratio. This unique dual amplifier allows the
elimination of external components for offset nulling and
frequency compensation.
SIMPLIFIED SCHEMATIC
V+
Q6
R3
NULL
R1
*
R2
*
Q21
Q23
R23
R24
Q24
R4
C2
Q22
C1
Q20 Q19
R9
OUTPUT
NON
INVERTING
INPUT (+)
INVERTING
INPUT (–)
Q3
Q11
Q12
Q26
R12
Q1A Q1B
Q2B
Q2A
R5
C3
R11 C4
Q45
Q46
Q27
Q28
V-
*
R1 AND R2 ARE PREMATURELY ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
OP227–SPECIFICATIONS
Individual Amplifier Characteristics
(V =
S
15 V, T
A
= 25 C, unless otherwise noted.)
OP227E
Min
Typ
Max
20
0.2
7
±
10
80
1.0
35
±
40
0.20
OP227G
Min
Typ
Max
60
0.4
12
±
15
0.09
180
2.0
75
±
80
0.28
Unit
mV
mV/M
O
nA
nA
mV
p-p
Parameter
INPUT OFFSET VOLTAGE
LONG-TERM V
OS
STABILITY
INPUT OFFSET CURRENT
INPUT BIAS CURRENT
INPUT NOISE VOLTAGE
INPUT NOISE VOLTAGE
DENSITY
Symbol
V
OS
V
OS
/Time
I
OS
I
B
e
n p-p
Conditions
Note 1
Notes 2,4
0.1 Hz to 10 Hz
Notes 3,5
f
O
= 10 Hz
3
f
O
= 30 Hz
3
f
O
= 1000 Hz
3
f
O
= 10 Hz
3, 6
f
O
= 30 Hz
3, 6
f
O
= 1000 Hz
3, 6
Note 7
1.3
±
11.0
V
CM
=
±
11 V
V
S
=
±
4 V to
±
18 V
R
L
2 kW,
V
O
=
±
10 V
R
L
600 kW,
V
O
=
±
10 V
R
L
R
L
R
L
2 kW
600
W
2 kW
4
114
0.08
e
n
3.5
3.1
3.0
1.7
1.0
0.4
6
3
±
12.3
126
6.0
4.7
3.9
4.5
2.5
0.7
0.7
±
11.0
100
3.8
3.3
3.2
1.7
1.0
0.4
4
2
±
12.3
120
9.0
5.9
4.6
nV/
Hz
nV/
Hz
nV/
Hz
pA/
Hz
pA/
Hz
pA/
Hz
MW
GW
V
dB
INPUT NOISE DENSITY
i
n
0.7
INPUT RESISTANCE
Differential Mode
Common Mode
INPUT VOLTAGE RANGE
COMMON-MODE
REJECTION RATIO
POWER SUPPLY
REJECTION RATIO
LARGE-SIGNAL
VOLTAGE GAIN
R
IN
R
INCM
IVR
CMRR
PSRR
1
10
2
20
mV/V
A
VO
1000
800
±
12.0
±
10.0
1.7
5
1800
1500
±
13.8
±
11.5
2.8
8
70
90
±
4
140
700
600
±
11.5
±
10.0
1.7
5
1500
1500
±
13.5
±
11.5
2.8
8
70
100
±
4
170
V/mV
V/mV
V
V
V/ms
MHz
W
mW
mV
OUTPUT VOLTAGE SWING
SLEW RATE
GAIN BANDWIDTH PROD.
OPEN-LOOP OUTPUT
RESISTANCE
POWER CONSUMPTION
OFFSET ADJUSTMENT
RANGE
V
O
SR
GBW
R
O
P
d
Note 4
V
O
= 0, I
O
= 0
Each Amplifier
R
p
= 10 kW
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power. E Grade specifications are
guaranteed fully warmed up.
2
Long term input offset voltage stability refers to the average trend line of V
OS
vs. time over extended periods after the first 30 days of operation. Excluding the initial
hour of operation, changes in V
OS
during the first 30 days are typically 2.5
mV.
Refer to the Typical Performance Curve.
3
Sample tested.
4
Parameter is guaranteed by design.
5
See test circuit and frequency response curve for 0.1 Hz to 10 Hz tester.
6
See test circuit for current noise measurement.
7
Guaranteed by input bias current.
Specifications subject to change without notice.
–2–
REV. A
OP227
SPECIFICATIONS
Individual Amplifier Characteristics
(V =
S
15 V, –25 C
£
T
A
£
+85 C, unless otherwise noted.)
Max
140
OP227G
Min
Typ
85
Max
280
Unit
mV
mV/
C
nA
nA
V
dB
mV/V
V/mV
V
Parameter
INPUT OFFSET
VOLTAGE
AVERAGE INPUT
OFFSET DRIFT
INPUT OFFSET
CURRENT
INPUT BIAS
CURRENT
INPUT VOLTAGE
RANGE
COMMON-MODE
REJECTION RATIO
POWER SUPPLY
REJECTION RATIO
LARGE-SIGNAL
VOLTAGE GAIN
OUTPUT VOLTAGE
SWING
Symbol
V
OS
TCV
OS
TCV
OSn
I
OS
I
B
IVR
CMRR
PSRR
Conditions
Note 1
OP227E
Min
Typ
40
Note 2
0.5
10
±
14
±
10
±
11.8
124
1.0
50
±
60
±
10
96
0.5
20
±
25
±
11.8
118
1.8
135
±
150
V
CM
=
±
10 V
V
S
=
±
4.5 V to
±
18 V
R
L
2 kW,
V
O
=
±
10 V
R
L
S
110
2
15
2
32
A
VO
V
O
750
±
11.7
A
1500
±
13.6
450
±
11.0
1000
±
13.3
2 kW
Matching Characteristics
(V =
±15
V, T = 25 C, unless otherwise noted.)
Parameter
INPUT OFFSET
VOLTAGE MATCH
AVERAGE
NONINVERTING
CURRENT
NONINVERTING
OFFSET CURRENT
INVERTING OFFSET
CURRENT
COMMON-MODE
REJECTION RATIO
MATCH
POWER SUPPLY
REJECTION RATIO
MATCH
CHANNEL
SEPARATION
Symbol
V
OS
Conditions
OP227E
Min
Typ
25
±
10
Max
80
±
40
OP227G
Min
Typ
55
±
15
Max
300
±
90
Unit
mV
Bias
nA
I
B
+
I
B
+ =
I
B
+
A
+
I
B
+
B
2
I
OS
+
I
OS
-
CMRR
I
OS
+ = I
B
+
A
-I
B+B
I
OS
- = I
B
-
A
-I
B
-
B
V
CM
=
±
11 V
V
S
=
±
4 V to
±
18 V
Note 1
126
110
±
12
±
12
123
±
60
±
60
97
±
20
±
20
117
±
130
±
130
nA
nA
dB
PSRR
2
154
10
126
2
154
20
mV/V
dB
CS
NOTES
1
Input Offset Voltage measurements are performed by automated equipment approximately 0.5 seconds after application of power.
2
The TCV
OS
performance is within the specifications unnulled or when nulled with R
P
= 8 kW to 20 kW, optimum performance is obtained with R
P
= 8 kW.
3
Sample tested.
Specifications subject to change without notice.
REV. A
–3–
OP227–SPECIFICATIONS
Matching Characteristics
(V =
S
15 V, T
A
= -25 C to +85 C, unless otherwise noted.)
OP227E
Min
Typ
40
Max
140
1.0
±
60
OP227G
Min
Typ
90
0.5
±
25
Max
400
1.8
±
170
Unit
mV
mV/
C
nA
Parameter
INPUT OFFSET
VOLTAGE MATCH
INPUT OFFSET
TRACKING
AVERAGE
NONINVERTING
BIAS CURRENT
AVERAGE DRIFT OF
NONINVERTING BIAS
CURRENT
NONINVERTING
OFFSET CURRENT
AVERAGE DRIFT OF
NONINVERTING
OFFSET CURRENT
INVERTING OFFSET
CURRENT
COMMON-MODE
REJECTION RATIO
MATCH
POWER SUPPLY
REJECTION RATIO
MATCH
NOTES
*Sample
tested.
Symbol
V
OS
TC V
OS
I
B
+
Conditions
Nulled or Unnulled*
0.3
±
14
I
+ +
I
+
I
B
+ =
B A B B
2
TCI
B
+
I
OS
+
TCI
OS
+
I
OS
–
CMRR
I
OS
– = I
B
–
A
–I
B
–
B
V
CM
=
±
10 V
V
S
=
±
4.5 V to
±
18 V
106
I
OS
+ = I
B
+
A
–I
B
+
B
80
±
20
130
±
20
120
±
90
90
±
90
180
±
35
250
±
35
112
±
250
±
250
pA/ C
nA
pA/ C
nA
dB
mV/V
PSRR
2
15
3
32
Specifications subject to change without notice.
–4–
REV. A
OP227
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
22 V
Input Voltage
1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
22 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . .
±
0.7 V
Differential Input Current
2
. . . . . . . . . . . . . . . . . . . . .
±
25 mA
Storage Temperature Range . . . . . . . . . . . . . –65∞C to +150∞C
Operating Temperature Range
OP227E, OP227G . . . . . . . . . . . . . . . . . . . . –25∞C to +85∞C
Lead Temperature (Soldering 60 sec) . . . . . . . . . . . . . . 300∞C
NOTES
1
For supply voltages less than
±
22 V, the absolute maximum input voltage is equal
to the supply voltage.
2
The OP227 inputs are protected by back-to-back diodes. Current limiting resistors
are not used in order to achieve low noise. If differential input voltage exceeds
±
0.7
V, the input current should be limited to 25 mA.
3
JA
is specified for worst-case mounting conditions, i.e.,
JA
is specified for device
in socket for CERDIP package.
ABSOLUTE MAXIMUM RATINGS
THERMAL CHARACTERISTICS
Thermal Resistance
14-Lead CERDIP
3
JA
= 106∞C/W
JC
= 16∞C/W
ORDERING GUIDE
T
A
= 25 C
V
OS
MAX ( V)
80
180
Hermetic
DIP 14-Lead
OP227EY
OP227GY
Operating
Temperature Range
IND
IND
For military processed devices, please refer to the Standard
Microcircuit Drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp.
SMD Part Number
5962-8688701CA
*
ADI Equivalent
OP227AYMDA
*Not
recommended for new design, obsolete April 2002.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP227 features propriety ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefor, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–5–
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
