INTEGRATED CIRCUITS
DATA SHEET
OM6211
48
×
84 dot matrix LCD driver
Product specification
File under Integrated Circuits, IC12
2002 Jan 17
Philips Semiconductors
Product specification
48
×
84 dot matrix LCD driver
CONTENTS
1
2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
8
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
9
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
9.10
9.11
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
PIN FUNCTIONS
ROW 0 to ROW 47 row driver outputs
COL 0 to COL 83 column driver outputs
V
SS1
and V
SS2
: negative power supply rails
V
DD1
to V
DD3
: positive power supply rails
V
LCDOUT
, V
LCDIN
and V
LCDSENSE
: LCD power
supply
V
OS4
to V
OS0
: calibration inputs
SDIN: serial data input
SDOUT: serial data output
SCLK: serial clock input
SCE: chip enable
OSC: oscillator
MX: horizontal mirroring
ID3 and ID4: identification inputs
RES: reset
T1, T2, T3, T4, T5 and T6: test pins
BLOCK DIAGRAM FUNCTIONS
Oscillator
Serial interface control
Command decoder
Display data RAM (DDRAM)
Timing generator
Address Counter (AC)
Display address counter
V
LCD
generator
Bias voltage generator
LCD row and column drivers
Reset
FUNCTIONAL DESCRIPTION
Reset
Power-down
LCD voltage selector
Oscillator
Timing
Column driver outputs
Row driver outputs
Drive waveforms
Bias system
Voltage multiplier control
Temperature compensation
9.12
10
10.1
10.2
11
11.1
11.2
11.2.1
11.2.2
12
12.1
13
14
15
16
16.1
16.2
17
18
18.1
18.2
18.3
18.4
18.5
18.5.1
18.5.2
18.5.3
18.5.4
18.6
18.7
18.8
19
20
21
22
23
24
V
LCD
generator
INITIALIZATION
OM6211
Initialization sequence
Frame frequency calibration (OC)
ADDRESSING
Addressing
Serial interface
Write mode
Read mode
INSTRUCTIONS
Instruction set
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
AC CHARACTERISTICS
Serial interface timing
Reset timing
APPLICATION INFORMATION
MODULE MAKER PROGRAMMING
V
LCD
calibration
V
PR
default value
Seal bit
OTP architecture
Serial interface commands
Enable OTP
CALMM
Load factory default
Refresh
Example of filling the shift register
Programming flow
Programming specification
BONDING PAD LOCATIONS
DEVICE PROTECTION DIAGRAM
TRAY INFORMATION
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
2002 Jan 17
2
Philips Semiconductors
Product specification
48
×
84 dot matrix LCD driver
1
FEATURES
2
APPLICATIONS
OM6211
•
Single-chip LCD controller/driver
•
48 row, 84 column outputs
•
Display data RAM 48
×
84 bits
•
3-line serial interface, maximum 4.0 Mbit/s
•
On-chip:
– Generation of LCD supply voltage V
LCD
– Generation of intermediate LCD bias voltages
– Oscillator (requires no external components).
•
CMOS compatible inputs
•
Mux rate 1 : 48
•
Logic supply voltage range V
DD1
to V
SS
:
– 1.7 to 2.3 V.
•
Supply voltage range for high voltage part V
DD2
to V
SS
:
– 2.5 to 4.5 V.
•
LCD supply voltage range V
LCD
to V
SS
:
– 4.5 to 9.0 V.
•
Low power consumption (typical 90
µA),
suitable for
battery operated systems
•
External reset
•
Temperature compensation of V
LCD
•
Temperature range: T
amb
=
−40
to +85
°C
•
Manufactured in N-well silicon gate CMOS process.
4
ORDERING INFORMATION
•
Battery powered telecommunication systems.
3
GENERAL DESCRIPTION
The OM6211 is a low power CMOS LCD row/column
driver, designed to drive a dot matrix graphic display of
48 rows and 84 columns. All necessary functions for the
display are provided in a single chip, including on-chip
generation of LCD supply and bias voltages, resulting in a
minimum of external components and low power
consumption. The OM6211 interfaces to microcontrollers
via a 3-line serial interface.
PACKAGE
TYPE NUMBER
NAME
OM6211U/2/F1
tray
DESCRIPTION
chip with bumps in tray
VERSION
−
2002 Jan 17
3
Philips Semiconductors
Product specification
48
×
84 dot matrix LCD driver
5
BLOCK DIAGRAM
OM6211
handbook, full pagewidth
VDD1
VDD2
VDD3
COL0 to COL83
ROW0 to ROW47
48
ROW DRIVERS
VSS1
VSS2
T4, T5,
T6
T1, T2,
T3
ID3, ID4
MX
BIAS
VOLTAGE
GENERATOR
3
3
84
COLUMN DRIVERS
SHIFT REGISTER
OM6211
2
RESET
DATA LATCHES
OSCILLATOR
OSC
RES
VLCDIN
TIMING
GENERATOR
VLCDsense
VLCDOUT
VOS [4:0]
5
VLCD
GENERATOR
DISPLAY DATA RAM
48
×
84 bits
DISPLAY
ADDRESS
COUNTER
SCLK
SDIN
SDOUT
SERIAL INTERFACE
CONTROL
COMMAND
DECODER
ADDRESS
COUNTER
MGU272
SCE
Fig.1 Block diagram.
2002 Jan 17
4
Philips Semiconductors
Product specification
48
×
84 dot matrix LCD driver
6
PINNING
SYMBOL
V
OS4
V
OS3
V
OS2
V
OS1
V
OS0
T6
RES
T5
T4
T3
T2
T1
SCE
V
SS2
V
SS1
OSC
SDOUT
7
7.1
PAD
3
4
5
6
7
8 to 11
16
17
18
19
20
21
22
23 to 30
31 to 38
40
41
DESCRIPTION
input pin 4 for V
LCD
calibration
input pin 3 for V
LCD
calibration
input pin 2 for V
LCD
calibration
input pin 1 for V
LCD
calibration
input pin 0 for V
LCD
calibration
test input 6
external reset input
(active LOW)
test input 5
test input 4
test output 3
test output 2
test output 1
chip enable input
(active LOW)
ground
ground
oscillator input
serial data output
7.5
OM6211
SYMBOL
SDIN
SCLK
ID4
ID3
MX
V
DD1
V
DD2
V
DD3
V
LCDSENSE
V
LCDOUT
V
LCDIN
ROW 0 to
ROW 23
COL 0 to
COL 83
ROW 47 to
ROW 24
PAD
42
43
44
45
46
47 to 52
53 to 60
61 to 64
65
66 to 72
73 to 78
89 to 112
113 to 196
197 to 220
DESCRIPTION
serial data input
serial clock input
module identification input
module identification input
horizontal mirroring input
logic supply voltage
voltage multiplier supply
voltage
voltage multiplier supply
voltage
V
LCD
generator regulation
input
V
LCD
generator output
LCD supply voltage input
LCD row driver outputs
LCD column driver outputs
LCD row driver outputs
1, 12 to 15, dummy pads
39, 79,
81 to 88
and
221 to 225
PIN FUNCTIONS
ROW 0 to ROW 47 row driver outputs
V
LCDOUT
, V
LCDIN
and V
LCDSENSE
: LCD power
supply
These pads output the display row signals.
7.2
COL 0 to COL 83 column driver outputs
These pads output the display column signals.
7.3
V
SS1
and V
SS2
: negative power supply rails
If the internal V
LCD
generator is used, then all three pins
must be connected together. If not (V
LCD
generator is
disabled and an external voltage is applied to V
LCDIN
), then
V
LCDOUT
must be left open-circuit, V
LCDSENSE
must be
connected to V
LCDIN
, V
DD2
and V
DD3
should be applied
according to the specified voltage range. The following
settings are also required: HVE = 0, S
1
= 1 and S
0
= 0.
7.6
V
OS4
to V
OS0
: calibration inputs
Negative power supply rails V
SS1
and V
SS2
must be
connected together, hereafter referred to as V
SS
. When a
pin has to be connected externally to V
SS
, then pin V
SS1
should be used.
7.4
V
DD1
to V
DD3
: positive power supply rails
Positive power supply rails: V
DD1
for logic supply, V
DD2
and
V
DD3
for voltage multiplier. V
DD2
and V
DD3
must be
connected together, hereafter referred to as V
DD2
.
Five pull-up input pins for on-glass V
LCD
calibration. Each
pin may be connected to V
SS
, which corresponds to
logic 0, or left open-circuit, which corresponds to logic 1.
All five pins define a 5-bit two’s complement number
ranging from
−16
to 15 decimal (from 10000 to 01111).
The default value, with all pins connected to V
SS
, is
0 decimal (00000).
2002 Jan 17
5
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