DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3353
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
ORDERING INFORMATION
PART NUMBER
2SK3353
2SK3353-S
2SK3353-Z
PACKAGE
TO-220AB
TO-262
TO-220SMD
DESCRIPTION
The 2SK3353 is N-channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
•
Super low on-state resistance:
5
5
R
DS(on)1
= 9.5 mΩ MAX. (V
GS
= 10 V, I
D
= 41 A)
R
DS(on)2
= 14 mΩ MAX. (V
GS
= 4 V, I
D
= 41 A)
•
Built-in gate protection diode
5
•
Low C
iss
: C
iss
= 4650 pF TYP.
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
V
DSS
V
GSS(AC)
I
D(DC)
I
D(pulse)
P
T
P
T
T
ch
T
stg
I
AS
E
AS
60
±20
±82
±328
95
1.5
150
–55 to +150
45
202
V
V
A
A
W
W
°C
°C
A
mJ
5
Drain Current (pulse)
Note1
5
Total Power Dissipation (T
C
= 25°C)
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
5
5
Single Avalanche Current
Note2
Single Avalanche Energy
Note2
Notes 1.
PW
≤
10
µ
s, Duty cycle
≤
1 %
5
2.
Starting T
ch
= 25 °C, R
G
= 25
Ω,
V
GS
= 20 V
→
0 V
THERMAL RESISTANCE
5
Channel to Case
Channel to Ambient
Rth(ch-C)
Rth(ch-A)
1.32
83.3
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D14130EJ1V0DS00 (1st edition)
Date Published June 1999 NS CP(K)
Printed in Japan
The mark
5
shows major revised points.
©
1999
2SK3353
5
ELECTRICAL CHARACTERISTICS (T
A
= 25 °C)
CHARACTERISTICS
Drain to Source On-state Resistance
SYMBOL
R
DS(on)1
R
DS(on)2
Gate to Source Cut-off Voltage
Forward Transfer Admittance
Drain Leakage Current
Gate to Source Leakage Current
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS(off)
| y
fs
|
I
DSS
I
GSS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
I
F
= 82 A, V
GS
= 0 V
I
F
= 82 A, V
GS
= 0 V,
di/dt = 100 A/
µ
s
I
D
= 82 A , V
DD
= 48 V, V
GS
= 10 V
I
D
= 41 A, V
GS(on)
= 10 V, V
DD
= 30 V,
R
G
= 10
Ω
TEST CONDITIONS
V
GS
= 10 V, I
D
= 41 A
V
GS
= 4 V, I
D
= 41 A
V
DS
= 10 V, I
D
= 1 mA
V
DS
= 10 V, I
D
= 41 A
V
DS
= 60 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
V
DS
= 10 V, V
GS
= 0 V, f = 1 MHz
4650
780
380
100
1550
280
420
90
14
38
1.0
60
110
1.5
30
MIN.
TYP.
7.5
10.5
2.0
50
10
±10
MAX.
9.5
14
2.5
UNIT
mΩ
mΩ
V
S
µ
A
µ
A
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
= 20
→
0 V
50
Ω
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
V
DD
PG.
R
G
R
G
= 10
Ω
V
GS
R
L
V
DD
I
D
90 %
90 %
I
D
V
GS
Wave Form
0
10 %
V
GS(on)
90 %
BV
DSS
I
AS
I
D
V
DD
V
DS
V
GS
0
τ
τ
= 1
µs
Duty Cycle
≤
1 %
I
D
Wave Form
0
10 %
t
d(on)
t
on
t
r
t
d(off)
t
off
10 %
t
f
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= 2 mA
PG.
50
Ω
R
L
V
DD
2
Data Sheet D14130EJ1V0DS00
2SK3353
•
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
•
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
•
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
•
Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
•
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
•
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
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systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
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support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
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