H8/3090 F-ZTAT™
HD64F3090
Hardware Manual
ADE-602-267
Rev. 1.0
2/25/02
Hitachi, Ltd.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Rev.1.0, 02/02, page ii of xvi
Preface
This LSI is a high-performance single-chip microcomputer made up of the H8/300H CPU
employing a 32-bit internal architecture as its core, and the peripheral functions required to
configure a system.
This LSI is equipped with ROM, RAM, a 16-bit timer, 8-bit timers, a programmable timing
pattern controller (TPC), a watchdog timer (WDT), a serial communication interface (SCI), a
smart card interface, an A/D converter, a D/A converter, and I/O ports as on-chip peripheral
modules required for system configuration.
A flash memory (F-ZTAT
TM
*) version is available for this LSI's ROM. This provides flexibility as
it can be reprogrammed in no time to cope with all situations from the early stages of mass
production to full-scale mass production. This is particularly applicable to application devices with
specifications that will most probably change.
Note: * F-ZTAT
TM
is a trademark of Hitachi, Ltd.
Target Users: This manual was written for users who will be using the H8/3090F in the design of
application systems. Target users are expected to understand the fundamentals of
electrical circuits, logical circuits, and microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of the H8/3090F to the target users.
Refer to the H8/300H Series Programming Manual for a detailed description of
the instruction set.
Notes on reading this manual:
•
In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions, and electrical characteristics.
In order to understand the details of the CPU's functions
Read the H8/300H Series Programming Manual.
In order to understand the details of a register when its name is known
The addresses, bits, and initial values of the registers are summarized in appendix B, Internal
I/O Registers.
Rule:
Bit order:
The MSB is on the left and the LSB is on the right.
The latest versions of all related manuals are available from our web site.
Please ensure you have the latest versions of all documents you require.
http://www.hitachisemiconductor.com/
Rev.1.0, 02/02, page iii of xvi
•
•
Related Manuals:
H8/3090F manuals:
Manual Title
H8/3090 F-ZTAT
TM
Hardware Manual
H8/300H Series Programming Manual
ADE No.
This manual
ADE-602-053
User's manuals for development tools:
Manual Title
H8S, H8/300 Series C/C++ Compiler, Assembler, Optimizing Linkage Editor
User's Manual
H8S, H8/300 Series Simulator/Debugger User's Manual
H8S, H8/300 Series Hitachi Embedded Workshop, Hitachi Debugging
Interface Tutorial
Hitachi Embedded Workshop User's Manual
ADE No.
ADE-702-247
ADE-702-282
ADE-702-231
ADE-702-201
Application notes:
Manual Title
Hitachi Microcomputer Technical Q&A H8/300H Series Application Notes
ADE No.
ADE-502-038
Rev.1.0, 02/02, page iv of xvi
Contents
Section 1 Overview ........................................................................................... 1
1.1 Overview................................................................................................................................. 1
1.2 Block Diagram........................................................................................................................ 6
1.3 Pin Description ....................................................................................................................... 7
1.3.1 Pin Arrangement....................................................................................................... 7
1.3.2 Pin Functions ............................................................................................................ 8
1.4 Differences between H8/3090F and H8/3064F ...................................................................... 17
Section 2 CPU ................................................................................................... 19
2.1 Overview................................................................................................................................. 19
2.1.1 Features..................................................................................................................... 19
2.1.2 Differences from H8/300 CPU ................................................................................. 20
2.2 CPU Operating Modes ........................................................................................................... 21
2.3 Address Space......................................................................................................................... 21
2.4 Register Configuration ........................................................................................................... 22
2.4.1 Overview................................................................................................................... 22
2.4.2 General Registers ...................................................................................................... 23
2.4.3 Control Registers ...................................................................................................... 24
2.4.4 Initial CPU Register Values...................................................................................... 25
2.5 Data Formats........................................................................................................................... 26
2.5.1 General Register Data Formats................................................................................. 26
2.5.2 Memory Data Formats .............................................................................................. 28
2.6 Instruction Set......................................................................................................................... 29
2.6.1 Instruction Set Overview .......................................................................................... 29
2.6.2 Instructions and Addressing Modes.......................................................................... 30
2.6.3 Tables of Instructions Classified by Function .......................................................... 31
2.6.4 Basic Instruction Formats ......................................................................................... 40
2.6.5 Notes on Use of Bit Manipulation Instructions ........................................................ 41
2.7 Addressing Modes and Effective Address Calculation ......................................................... 43
2.7.1 Addressing Modes .................................................................................................... 43
2.7.2 Effective Address Calculation .................................................................................. 45
2.8 Processing States .................................................................................................................... 49
2.8.1 Overview................................................................................................................... 49
2.8.2 Program Execution State........................................................................................... 50
2.8.3 Exception-Handling State......................................................................................... 50
2.8.4 Exception-Handling Sequences ................................................................................ 52
2.8.5 Bus-Released State ................................................................................................... 53
2.8.6 Reset State................................................................................................................. 53
Rev.1.0, 02/02, page v of xvi
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