REJ09B0103-0500O
The revision list can be viewed directly by
clicking the title page.
The revision list summarizes the locations of
revisions and additions. Details should always
be checked by referring to the relevant text.
16
H8S/2639, H8S/2638,
H8S/2636, H8S/2630
Group
Hardware Manual
Renesas 16-Bit Single-Chip Microcomputer
H8S Family/H8S/2200 Series
Rev. 5.00
Revision Date: Mar. 15, 2004
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and
more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas
Technology Corp. product best suited to the customer's application; they do not convey any license
under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or
a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-
party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or
circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and
algorithms represents information on products at the time of publication of these materials, and are
subject to change by Renesas Technology Corp. without notice due to product improvements or
other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or
an authorized Renesas Technology Corp. product distributor for the latest product information
before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising
from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means,
including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data,
diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total
system before making a final decision on the applicability of the information and products. Renesas
Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the
information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or
system that is used under circumstances in which human life is potentially at stake. Please contact
Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when
considering the use of a product contained herein for any specific purposes, such as apparatus or
systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in
whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must
be exported under a license from the Japanese government and cannot be imported into a country
other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the
country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products
contained therein.
Rev. 5.00, 03/04, page ii of xlviii
Preface
This LSI has the internal 32-bit H8S/2600 CPU and includes a variety of peripheral functions
necessary for a system configuration. It serves as a high-performance microcomputer.
The built-in peripheral devices include a 16-bit timer pulse unit (TPU), a programmable pulse
generator (PPG), a watchdog timer unit (WDT), a serial communication interface (SCI), an A/D
converter, a motor control PWM timer (PWM), a PC brake controller and I/O ports. It also has an
internal data transfer controller (DTC), which performs high-speed data transfer without using the
CPU, thus enabling the use of the LSI as an embedded microcomputer in various advanced control
systems. Two types of internal ROM are available: flash memory (F-ZTAT™*) and mask ROM.
The LSI can be used flexibly in a wide range of applications from applied equipment with varied
specifications and early production models to full-scale mass-produced products.
Note: * F-ZTAT™ is a trademark of Renesas Technology Corp.
Target Users: This manual was written for users who will be using the H8S/2636, H8S/2638,
H8S/2639, and H8S/2630 in the design of application systems. Members of this
audience are expected to understand the fundamentals of electrical circuits, logical
circuits, and microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of the H8S/2636, H8S/2638, H8S/2639, and H8S/2630 to the above
audience. Refer to the H8S/2600 Series, H8S/2000 Series Programming Manual for
a detailed description of the instruction set.
Notes on reading this manual:
•
In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions and electrical characteristics.
•
In order to understand the details of the CPU's functions
Read the H8S/2600 Series, H8S/2000 Series Programming Manual.
•
In order to understand the details of a register when its name is known
The addresses, bits, and initial values of the registers are summarized in Appendix B, Internal
I/O Registers.
Example: Bit order: The MSB is on the left and the LSB is on the right.
Related Manuals:
The latest versions of all related manuals are available from our web site.
Please ensure you have the latest versions of all documents you require.
http://www.renesas.com/
Rev. 5.00, 03/04, page iii of xlviii
H8S/2636, H8S/2638, H8S/2639, H8S/2630 manuals:
Manual Title
H8S/2636, H8S/2638, H8S/2639, H8S/2630 Hardware Manual
H8S/2600 Series, H8S/2000 Series Programming Manual
ADE No.
This manual
ADE-602-083
Users manuals for development tools:
Manual Title
C/C++ Compiler, Assembler, Optimized Linkage Editor User's Manual
Simulator Debugger (for Windows) User's Manual
High-Performance Embedded Workshop User's Manual
ADE No.
ADE-702-247
ADE-702-037
ADE-702-201
Application Notes:
Manual Title
H8S Family Technical Q & A
ADE No.
ADE-502-059
Rev. 5.00, 03/04, page iv of xlviii
Main Revisions and Additions in this Edition
Item
All
1.1 Overview
1
Page
Revisions (See Manual for Details)
H8S/2630 added
Description amended
On-chip ROM is available as 128-kbyte, 256-kbyte, and 384-
TM
kbyte flash memory (F-ZTAT
*
version), and as 128-kbyte,
256-kbyte, and 384-kbyte mask ROM.
Table1-1 Overview
3
Memory specifications amended and note
*
added
Product Name
H8S/2636
H8S/2638
H8S/2639
H8S/2630
*
ROM
128 kbytes
256 kbytes
RAM
4 kbytes
16 kbytes
384 kbytes
Note:
*
Under development
4
Clock pulse generator specifications amended
•
Input clock frequency
H8S/2636, H8S/2638, H8S/2630: 4 to 20 MHz
H8S/2639: 4 to 5 MHz
5
Product lineup specifications amended and note
*
added
Model Name
Mask ROM Version F-ZTAT Version
HD6432639UF
(U-Mask Version)
HD6432639WF
(W-Mask Version)
HD6432630F
*
HD6432630UF
*
(U-Mask Version)
HD6432630WF
*
(W-Mask Version)
HD64F2639UF
(U-Mask Version)
HD64F2639WF
(W-Mask Version)
HD64F2630F
*
HD64F2630UF
*
(U-Mask Version)
HD64F2630WF
*
(W-Mask Version)
Subclock
(32 kHz
Oscillation)
Functions
Yes
Yes
No
Yes
Yes
I C bus
interface
No
Yes
No
No
Yes
384 k/
16 k
2
ROM/
RAM
(Bytes)
256 k/
16 k
Packages
FP-128B
Note:
*
Under development
Rev. 5.00, 03/04, page v of xlviii