DEMO CIRCUIT DC1303A
QUICK START GUIDE
LTC4098EPDC: USB
Compatible Switching Power Manager/Li-Ion
Charger with Overvoltage Protection
DESCRIPTION
Demonstration Circuit 1303A is a high efficiency USB
Power/Li-Ion battery manager plus a HV regulator bat-
tery tracking controller. The LTC4098EPDC is avail-
able in a 20-pin (3mm × 4mm × 0.55mm) UTQFN sur-
face mount package.
L
, LTC, LTM, LT, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered
trademarks of Linear Technology Corporation. Adaptive Power, C-Load, DirectSense, Easy
Drive, FilterCAD, Hot Swap, LinearView, μModule, Micropower SwitcherCAD, Multimode
Dimming, No Latency
ΔΣ,
No Latency Delta-Sigma, No R
SENSE
, Operational Filter, PanelProtect,
PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT,
UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names
may be trademarks of the companies that manufacture the products.
PERFORMANCE SUMMARY
Specifications are at T
A
= 25°C
SYMBOL
V
BUS
V
OUT
V
BAT
I
BAT
PARAMETER
Bus Input Voltage Range
Output Voltage Range
Output Float Voltage
Output Charge Current
CONDITIONS
Input disabled from 6V–30V
Range is mode and load dependant
Constant voltage mode
Constant current mode
MIN
4.35
3.5
TYP
MAX
5.5
5.5
1
UNITS
V
V
V
A
4.2
0.5
OPERATING PRINCIPLES
The LTC4098EPDC is a full featured USB power man-
ager and Li-Ion battery charger, with reacharound.
The Bat-Track™ battery charger pre-regulator ensures
the charger operates at the highest possible efficiency.
The LTC4098EPDC is composed of 5 functional blocks,
all working together: USB Power Manager, Pre-
regulator, Battery Charger, Ideal Diode, and OverVolt-
age Protection.
USB Power Manager
The USB Power Manager is used to manage the load
that the LTC4098EPDC system presents to the USB
interface. The load current can be programmed by
changing the CLPROG resistor (R5), and by setting the
operating mode to 1X, 5X or 10x, with the [d2-d0] in-
puts.
Please note that the charger on/off is also controlled by
the [d2-d0] inputs.
The USB Power Manager also uses the “WALL” input
to determine that power is being supplied directly to
VOUT and shuts off the internal preregulator, minimiz-
ing the load on the USB input.
Pre-Regulator
The pre-regulator is a high efficiency buck regulator
that produces a voltage at VOUT = BAT + 0.3V. The
voltage at VOUT is input to the battery charger, greatly
reducing dissipation in the charger.
The pre-regulator also monitors the WALL pin, and
when the voltage is higher than 4.3V, it shuts off.
When the voltage on the Wall pin is higher than 4.3V,
the /ACPR and VC pins are also active. The /ACPR pin
activates the gate of an N-channel MOSFET allowing a
separate HV Buck Regulator to supply VOUT. The VC
pin implements the Bat-Track function for the HV Buck
Regulator, also known as reacharound, enabling the
same high efficiency battery charger operation with an
external HV buck regulator.
Battery Charger
The battery charger operates in constant current mode,
until the battery voltage rises to approximately the
FLOAT voltage, of 4.2V, and then the charger switches
to constant voltage mode.
The charge current is programmed by the PROG (R4)
resistor, and has been set to 500mA, on DC1303A,
with a 2.00kΩ resistor. The battery charger imple-
ments trickle charging, for initial battery voltages less
than 3.0V. It also implements a charge termination
timeout of 4 hours, and a bad cell charging timeout of
30 minutes. An NTC input is used to determine if the
battery temperature is suitable for charging, too hot or
too cold.
The state of charge, as well as any faults, is signaled
with the
CHRG
pin.
Ideal Diode
The Ideal Diode block is composed of an internal Ideal
Diode implemented with an on die MOSFET, as well as
a MOSFET gate driver that allows the use of a parallel
external MOSFET.
When the voltage on VOUT drops more than 30mV
below the voltage at BAT, the Ideal Diode becomes
active. This will happen when there is neither a VBUS
nor external HV buck to supply VOUT, or the load on
VOUT exceeds the power available from those sources.
OverVoltage Protection
The overvoltage protection is composed of a sense pin,
OVSENSE, and an OVP MOSFET gate drive, OVGATE.
If the voltage on OVSENS is less than 6V, OVGATE is
driven above VBUS, by an internal charge pump, to
allow the use of a low cost N-channel MOSFET.
If the voltage on OVSENS exceeds 6V, the charge
pump is shut off and pulled to ground. This in turn
shuts off the external OVP MOSFET.
Although the OVP is usually shown protecting the
VBUS connection, it could also be used to protect the
VOUT connection to an external regulator.
R2, the OVSENS current limit resistor must be an
0603, or larger resistor. OVSENS is clamped at 6V, so
for a 30V input, the dissipation in the resistor is
24V
2
/6.04kΩ = 95mW. An 0603 resistor is rated at
100mW of continuous dissipation.
The battery charger must see a low impedance to
ground, which is case when a battery is attached. In
the event that a battery emulator is being used, or the
impedance to ground is above 1Ω, the circuit of C4
and R9-11 is recommended. Without this circuit there
will be approximately 100ma of 20-80kHz ac current in
the USB input. While this will not damage the
LTC4098EPDC, nor cause incorrect operation, it may
produce voltage waveforms that are undesireable. If
this is the case the network of C4 and R9-11 will re-
solve this issue.
The HV buck interface connector is intended for use
with specific demonstration boards, that contain HV
buck regulators tested to work with the LTC4098EPDC.
ASSEMBLY TEST PROCEDURE
Using short twisted pair leads for any power con-
nections, with all loads and power supplies off, refer
to Figures 1 & 2 for the proper measurement and
equipment setup.
A companion HV Buck demo board is required for
this check out procedure. The DC1394 (LT3480)
board is recommended, and will be used for the fol-
lowing procedure. Please refer to the DC1394 Quick
Start Guide for further information.
Follow the procedure below:
1. Select input from VUSB: Set WALL jumper
(DC1394, JP3) to “5V ADAPTOR”. Ensure that
PS3 is off. Since PS3 is off and the voltage in-
put is set to “5V ADAPTOR”, no voltage will be
sourced to VOUT from the DC1394 board. Thus
the only source of energy is the USB voltage in-
put.
2. Set PS1 to 5V, and PS4 to 3.6V. Observe VOUT
(VM4)
≅
3.6V, I(VUSB) (AM1)≅100mA,
(CLPROG) (VM7)≅ 1V. The default operating
mode is 100mA USB input current limit, and the
APPLICATIONS
The parasitic inductance in some USB cables may
cause the VUSB voltage to overshoot at plug in.
The OVGATE signal provides a slow turn on of Q1, the
OVP MOSFET. This slow turn on, in turn limits the
inrush current into C2, allowing the use of a capacitor
that exceeds the nominal USB specification.
2
battery charger on. The battery charger is pro-
grammed for 500mA of charge current by R4
(2k), so the charge is trying to source more cur-
ren from the USB input than the USB input cur-
rent limit. So Vout collapses down to approxi-
mately the battery voltage.
3. Set D1 (JP2) to “1”. Observe VOUT (VM4)
≅
3.95V, I(VUSB) (AM1)
≅
500mA, V(CLPROG)
(VM7)
≅
1.15V and V(PROG) (VM6)
≅
1V. By
setting D1 to “1”, the USB input current limit
has been increased to 5X (500mA) mode. The
USB input can now supply the battery with
500mA, so VOUT rises to V(BAT) + 0.35V.
4. Set D1 (JP2) to “0” and D0 (JP1) to “1”. Ob-
serve VOUT (VM4)
≅
3.95V, I(VUSB) (AM1)
≅
500mA, V(CLPROG) (VM7)
≅
0.6V and V(PROG)
(VM6)
≅
1V. The USB input current limit is now
in 10X (1A) mode, so the USB input current
limit current sense voltage, V(CLPROG), is at
about half its threshold (1.15V) value. But the
charge current sense is still
≅
1V, as the charger
is delivering the full programmed charge current.
5. Set PS1 to 0V, and Ld1 to 0A. Observe VOUT
(VM4)
≅
3.6V and V(VOUT,BAT)
≅
15mV. With
voltage on USB now 0V, there is no source of
energy so VOUT collapses until the ideal diode
comes on, and the battery holds VOUT up.
6. Set Ld1 to 1A. Observe VOUT (VM4)
≅
3.6V
and V(VOUT,BAT)
≅
30mV. Set Ld1 to 0A.
The Rds(on) of the external ideal diode
MOSFET is approximate 30mΩ, so at 1A, the
voltage drop in the ideal diode is approximately
30mV.
7. Set PS1 to 5V. Set NTC (JP4) to “EXT”. Does
the “Battery Charging” LED blink? Set NTC
(JP4) to “INT”. Setting the NTC (JP4) jumper
to “EXT”, uses the temperature sense NTC in
the battery pack. There is no battery pack con-
nected, so this connection is open. This is the
same as if the NTC where high impedance indi-
cating a “battery too cold” fault.
8. Set WALL (DC1394, JP3) to “HVBUCK”, and
SYNC (DC1394, JP1) to “PWM/SYNC”. In-
crease PS2 from 0V to 8V. Observe VOUT
(VM4)
≅
3.95V and V(PROG) (VM6)
≅
1V. The
LTC3480EDD HV buck regulator on the DC1394
board is now providing energy for the charger.
The LTC4098EPDC on the DC1303A board is
controlling the output voltage to provide the Bat-
Track function, and minimize dissipation in the
charger.
9. Set Ld1 to 1A. Observe VOUT (VM4)
≅
3.95V
and V(PROG) (VM6)
≅
1V. The LTC3480EDD
can supply up to 2A of load current. The
DC1303A board is currently drawing 1.5A,
500mA for the charger, and 1A into Ld1.
10. Set PS2 to 38V. Observe VOUT (VM4) and
V(PROG) (VM6). The LTC3480EDD can supply
up to 2A of load current. The DC1303A board is
currently drawing 1.5A, 500mA for the charger,
and 1A into Ld1.
11. Set Ld1 to 0A. Set WALL (DC1394, JP3) to “5V
ADAPTOR” and PS3 to 5V. Observe VOUT
(VM4)
≅
5V and V(PROG) (VM6)
≅
1V. The
charger current is now being supplied by the 5V
ADAPTOR, but the voltage is fixed, as the
LTC4098EPDC cannot control this voltage. This
means that the dissipation will be higher than
when operating the LTC4098EPDC from the
USB or HV buck inputs.
12. Set D2 (JP3) to “1”.
Does “BATTERY
CHARGING” LED go out? This turns the battery
charger off.
3
+
PS2
+
0V-40V supply
1A
-
AM2
-
+
VM2
-
+
-
AM3
PS3
+
0V-6V supply
2A
-
+
VM3
-
D2
D1
D0
AM4
+
VM4
+
-
+
-
Ld1
0V-5V
5A
-
AM1
+
PS1
+
0V-6V supply
2A
-
-
+
+
VM1
AM5
-
+
-
-
VM5
3.6Ω
+
-
PS4
0V-5V supply
2A
VM6
+
VM7
-
-
+
Note: All connections from equipment should be Kelvin connected directly to the Board PINS which they are connected to on this dia-
gram and any input, or output, leads should be twisted pair
Figure 1. Proper Measurement Equipment Setup for DC1303A
Figure 2. Measuring Input or Output Ripple
VIN
GND
4
ID
4
1
E4
5
NTC
IDGATE
10
VOUT
Leakage currrent must be < 50nA
1
NTC
15
D0
D1
D2
BATSENS
6
CHRG
8
2
3
5
J3
INPUT CURRENT LIMIT SETTINGS
D2 D1 D0
0
100mA (1X)
ON
ON
1A
(10X)
0
Q1
Si2306BDS
0
2
CURRENT
LIMIT
CHARGER
STATUS
0
0
1
1
0
0
OFF
OFF
OFF
1
1
0 500mA (5X)
1 2.5mA (SUSP)
ON
OFF
OFF
1
0
E1
VUSB
4.35V-5.5V, Non-operating Fault
Tolerance to 30V Continous,
36V Transient.
0
1
1
1
1
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VOUT
VC/TRACK
VOUT
GND
ACPR
GND
PG
WALL
SY NC
SHDN
DVCC
ILIM
SDA
HVOK/INIT
SCL
HVIN
J1
VUSB
1
D-
2
TP1
0 500mA (5X)
1 500uA (SUSP)
0 100mA (1X)
1 1A
(10X)
SQT-108-01-F-D-RA
HV BUCK
INTERFACE
D+
3
D-
TP2
D+
TP3
ID
R1
1.0
5%
LTC4098EPDC
13
U1
2
OVGATE
ACPR
1
OVSENS
WALL
18
19
VC
VBUS
20
GND
5
C1
10uF
0603
20%
6.3V
TP4
OVGATE
Leakage current
must be < 400nA
R2
6.04k
0603
14
C2
22uF
0805
20%
6.3V
MINI-B USB
E2
GND
L1
3.3uH
LPS4018-332MLC
VOUT
SW
4
NTCBIAS
VOUT
12
E3
NTCBIAS
R3
100k
C5
22uF
0805
20%
6.3V
Q2
Si2333DS
D1
BATTERY
CHARGING
E11
Green
GND
R13
1k
5%
0603
E12
VOUT
3.5V-5.5V
1.25A
E10
E9
JP1
D0
16
17
CHRG
0
1
7
PROG
CLPROG
GNDGND
21
9
BAT
11
3
R12
0
BATSENS
E8
BAT
VFLOAT = 4.2V
0.5A
C4
100uF
20%
6.3V
1206
R9
1.0
5%
R10
1.0
5%
R11
1.0
5%
E7
GND
J2
JP2
D1
0
1
JP3
D2
0
1
Figure 3. DC1303A Schematic
Unless noted:
Resistors: Ohms, 0402, 1%, 1/16W
Capacitors: uF, 0402, 10%, 50V
JP4
NTC
EXT
R8
0
R4
2.00k
C3
0.1uF
16V
R5
3.01k
R7
100k
INT
R6
0
1
2
3
BAT
GND
NTC
E5
PROG
E6
CLPROG
DF3-3P-2DSA
OPT
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