H8/3867 Series
H8/3867, H8/3866
H8/3865, H8/3864
H8/3863, H8/3862
H8/3827 Series
H8/3827, H8/3826
H8/3825, H8/3824
H8/3823, H8/3822
Hardware Manual
ADE-602-142A
Rev. 2.0
6/2/99
Hitachi Company or Division
Notice
When using this document, keep the following in mind:
1. This document may, wholly or partially, be subject to change without notice.
2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the
whole or part of this document without Hitachi’s permission.
3. Hitachi will not be held responsible for any damage to the user that may result from
accidents or any other reasons during operation of the user’s unit according to this document.
4. Circuitry and other examples described herein are meant merely to indicate the
characteristics and performance of Hitachi’s semiconductor products. Hitachi assumes no
responsibility for any intellectual property claims or other problems that may result from
applications based on the examples described herein.
5. No license is granted by implication or otherwise under any patents or other rights of any
third party or Hitachi, Ltd.
6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL
APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales
company. Such use includes, but is not limited to, use in life support systems. Buyers of
Hitachi’s products are requested to notify the relevant Hitachi sales offices when planning to
use the products in MEDICAL APPLICATIONS.
Contents
Contents ..... .....................................................................................................i
Preface ....... .....................................................................................................1
Section 1 Overview ........................................................................................3
1.1 Overview ........................................................................................................................ 3
1.2 Internal Block Diagram................................................................................................... 8
1.3 Pin Arrangement and Functions ...................................................................................... 9
1.3.1 Pin Arrangement................................................................................................ 9
1.3.2 Pin Functions ..................................................................................................... 11
Section 2 CPU................................................................................................15
2.1 Overview ........................................................................................................................ 15
2.1.1 Features ............................................................................................................. 15
2.1.2 Address Space.................................................................................................... 16
2.1.3 Register Configuration....................................................................................... 16
2.2 Register Descriptions ...................................................................................................... 18
2.2.1 General Registers............................................................................................... 18
2.2.2 Control Registers ............................................................................................... 19
2.2.3 Initial Register Values ....................................................................................... 20
2.3 Data Formats................................................................................................................... 20
2.3.1 Data Formats in General Registers..................................................................... 20
2.3.2 Memory Data Formats ....................................................................................... 22
2.4 Addressing Modes........................................................................................................... 23
2.4.2 Effective Address Calculation............................................................................ 25
2.5 Instruction Set................................................................................................................. 29
2.5.1 Data Transfer Instructions.................................................................................. 31
2.5.2 Arithmetic Operations........................................................................................ 33
2.5.3 Logic Operations ............................................................................................... 34
2.5.4 Shift Operations................................................................................................. 34
2.5.5 Bit Manipulations .............................................................................................. 36
2.5.6 Branching Instructions ....................................................................................... 40
2.5.7 System Control Instructions ............................................................................... 42
2.5.8 Block Data Transfer Instruction ......................................................................... 44
2.6 Basic Operational Timing ............................................................................................... 44
2.6.1 Access to On-Chip Memory (RAM, ROM) ........................................................ 44
2.6.2 Access to On-Chip Peripheral Modules.............................................................. 46
i
2.7 CPU States...................................................................................................................... 48
2.7.1 Overview ........................................................................................................... 48
2.7.2 Program Execution State.................................................................................... 50
2.7.3 Program Halt State............................................................................................. 50
2.7.4 Exception-Handling State .................................................................................. 50
2.8 Memory Map .................................................................................................................. 51
2.8.1 Memory Map...................................................................................................... 51
2.9 Application Notes ........................................................................................................... 57
2.9.1 Notes on Data Access ........................................................................................ 57
2.9.2 Notes on Bit Manipulation................................................................................. 59
2.9.3 Notes on Use of the EEPMOV Instruction ......................................................... 65
Section 3 Exception Handling ........................................................................ 67
3.1 Overview ........................................................................................................................ 67
3.2 Reset............................................................................................................................... 67
3.2.1 Overview ........................................................................................................... 67
3.2.2 Reset Sequence.................................................................................................. 67
3.2.3 Interrupt Immediately after Reset ...................................................................... 69
3.3 Interrupts ........................................................................................................................ 69
3.3.1 Overview ........................................................................................................... 69
3.3.2 Interrupt Control Registers................................................................................. 71
3.3.3 External Interrupts ............................................................................................. 80
3.3.4 Internal Interrupts .............................................................................................. 80
3.3.5 Interrupt Operations........................................................................................... 81
3.3.6 Interrupt Response Time.................................................................................... 86
3.4 Application Notes ........................................................................................................... 86
3.4.1 Notes on Stack Area Use ................................................................................... 86
3.4.2 Notes on Rewriting Port Mode Registers ........................................................... 88
Section 4 Clock Pulse Generators................................................................... 93
4.1 Overview ........................................................................................................................ 93
4.1.1 Block Diagram .................................................................................................. 93
4.1.2 System Clock and Subclock............................................................................... 93
4.2 System Clock Generator ................................................................................................. 94
4.3 Subclock Generator......................................................................................................... 98
4.4 Prescalers........................................................................................................................ 100
4.5 Note on Oscillators ......................................................................................................... 101
Section 5 Power-Down Modes ........................................................................ 103
5.1 Overview ........................................................................................................................ 103
5.1.1 System Control Registers................................................................................... 106
ii
5.2 Sleep Mode ..................................................................................................................... 110
5.2.1 Transition to Sleep Mode................................................................................... 110
5.2.2 Clearing Sleep Mode ......................................................................................... 111
5.2.3 Clock Frequency in Sleep (Medium-Speed) Mode ............................................. 111
5.3 Standby Mode................................................................................................................. 111
5.3.1 Transition to Standby Mode............................................................................... 111
5.3.2 Clearing Standby Mode ..................................................................................... 112
5.3.3 Oscillator Settling Time after Standby Mode is Cleared..................................... 112
5.3.4 Standby Mode Transition and Pin States ........................................................... 113
5.4 Watch Mode ................................................................................................................... 113
5.4.1 Transition to Watch Mode ................................................................................. 113
5.4.2 Clearing Watch Mode........................................................................................ 114
5.4.3 Oscillator Settling Time after Watch Mode is Cleared ....................................... 114
5.5 Subsleep Mode................................................................................................................ 114
5.5.1 Transition to Subsleep Mode.............................................................................. 114
5.5.2 Clearing Subsleep Mode .................................................................................... 115
5.6 Subactive Mode .............................................................................................................. 115
5.6.1 Transition to Subactive Mode ............................................................................ 115
5.6.2 Clearing Subactive Mode................................................................................... 115
5.6.3 Operating Frequency in Subactive Mode............................................................ 116
5.7 Active (Medium-Speed) Mode ........................................................................................ 116
5.7.1 Transition to Active (Medium-Speed) Mode ...................................................... 116
5.7.2 Clearing Active (Medium-Speed) Mode............................................................. 116
5.7.3 Operating Frequency in Active (Medium-Speed) Mode ..................................... 116
5.8 Direct Transfer................................................................................................................ 117
5.8.1 Overview of Direct Transfer .............................................................................. 117
5.8.2 Direct Transition Times ...................................................................................... 118
5.9 Module Standby Mode ..................................................................................................... 120
5.9.1 Setting Module Standby Mode............................................................................ 120
Section 6 ROM...............................................................................................123
6.1 Overview ........................................................................................................................ 123
6.1.1 Block Diagram................................................................................................... 123
6.2 H8/3867 and H8/3827 PROM Mode ............................................................................... 124
6.2.1 Setting to PROM Mode...................................................................................... 124
6.2.2 Socket Adapter Pin Arrangement and Memory Map .......................................... 124
6.3 H8/3867 and H8/3827 Programming ............................................................................... 127
6.3.1 Writing and Verifying........................................................................................ 127
6.3.2 Programming Precautions .................................................................................. 131
6.4 Reliability of Programmed Data....................................................................................... 132
iii
电子竞赛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
