SDFS063A − D2932, MARCH 1987 − REVISED OCTOBER 1993
SN54F244, SN74F244
OCTAL BUFFERS/DRIVERS
WITH 3 STATE OUTPUTS
•
•
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
Package Options Include Plastic
Small-Outline (SOIC) and Shrink
Small-Outline (SSOP) Packages, Ceramic
Chip Carriers, and Plastic and Ceramic
DIPs
SN54F244 . . . J PACKAGE
SN74F244 . . . DB, DW, OR N PACKAGE
(TOP VIEW)
description
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. Taken together with the
′F240
and
′F241,
these devices provide the choice of
selected combinations of inverting and
noninverting outputs, symmetrical OE (active-low
output-enable) inputs, and complementary OE
and OE inputs.
The
′F244
is organized as two 4-bit buffers/line
drivers with separate output enable (OE) inputs.
When OE is low, the device passes data from the
A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
The SN74F244 is available in TI’s shrink
small-outline package (DB), which provides the
same I/O pin count and functionality of standard
small-outline packages in less than half the
printed-circuit-board area.
The SN54F244 is characterized for operation over
the full military temperature range of − 55°C to
125°C. The SN74F244 is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
(each buffer)
INPUTS
OE
L
L
H
A
H
L
X
OUTPUT
Y
H
L
Z
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
SN54F244 . . . FK PACKAGE
(TOP VIEW)
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2Y4
1A1
1OE
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251−1443
•
DALLAS, TEXAS 75265
2Y1
GND
2A1
1Y4
2A2
2−1
SDFS063A − D2932, MARCH 1987 − REVISED OCTOBER 1993
SN54F244, SN74F244
OCTAL BUFFERS/DRIVERS
WITH 3 STATE OUTPUTS
logic symbol
†
1OE
1
EN
18
16
14
12
logic diagram (positive logic)
1OE
1
1A1
1A2
1A3
1A4
2
4
6
8
1Y1
1Y2
1Y3
1Y4
1A1
2
18
1Y1
1A2
4
16
1Y2
6
1A3
19
2OE
11
13
15
17
EN
8
1A4
2A1
2A2
2A3
2A4
9
7
5
3
2Y1
2Y2
2Y3
2Y4
11
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
2A1
13
2A2
15
2A3
17
2OE
19
14
1Y3
12
1Y4
9
2Y1
7
2Y2
5
2Y3
3
2A4
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.2 V to 7 V
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
Current into any output in the low state: SN54F244 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74F244 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range: SN54F244 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74F244 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
SDFS063A − D2932, MARCH 1987 − REVISED OCTOBER 1993
SN54F244, SN74F244
OCTAL BUFFERS/DRIVERS
WITH 3 STATE OUTPUTS
recommended operating conditions
SN54F244
MIN
VCC
VIH
VIL
IIK
IOH
IOL
TA
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature
−55
4.5
2
0.8
−18
− 12
48
125
0
NOM
5
MAX
5.5
SN74F244
MIN
4.5
2
0.8
−18
− 15
64
70
NOM
5
MAX
5.5
UNIT
V
V
V
mA
mA
mA
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VCC = 4.5 V,
VCC = 4.5 V
VCC = 4.75 V,
VOL
IOZH
IOZL
II
IIH
OE
IIL
IOS‡
ICC
Any A
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
Outputs open
VI = 0.5 V
VO = 0
Outputs high
Outputs low
Outputs disabled
−100
40
60
60
VCC = 4.5 V
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
TEST CONDITIONS
II = − 18 mA
IOH = − 3 mA
IOH = − 12 mA
IOH = − 15 mA
IOH = − 3 mA
IOL = 48 mA
IOL = 64 mA
VO = 2.7 V
VO = 0.5 V
VI = 7 V
VI = 2.7 V
SN54F244
MIN TYP†
MAX
−1.2
2.4
2
3.3
3.2
2
2.7
0.38
0.55
0.42
50
−50
0.1
20
−1
− 1.6
−225
60
90
90
−100
40
60
60
0.55
50
−50
0.1
20
−1
− 1.6
−225
60
90
90
mA
mA
mA
V
µA
µA
mA
µA
3.1
V
2.4
3.3
SN74F244
MIN TYP†
MAX
−1.2
UNIT
V
VOH
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
2−3
SDFS063A − D2932, MARCH 1987 − REVISED OCTOBER 1993
SN54F244, SN74F244
OCTAL BUFFERS/DRIVERS
WITH 3 STATE OUTPUTS
switching characteristics (see Note 2)
VCC = 5 V,
CL = 50 pF,
RL = 500
Ω,
TA = 25°C
′F244
MIN
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
A
OE
OE
Y
Y
Y
1.7
1.7
1.2
1.2
1.2
1.2
TYP
3.6
3.6
3.9
5
4.1
4.1
MAX
5.2
5.2
5.7
7
6
6
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500
Ω,
TA = MIN to MAX†
SN54F244
MIN
2
2
2
2
2
2
MAX
6.5
7
7
8.5
7
7.5
SN74F244
MIN
1.7
1.7
1.2
1.2
1.2
1.2
MAX
6.2
6.5
6.7
8
7
7
ns
ns
ns
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
UNIT
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.
2−4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2014
PACKAGING INFORMATION
Orderable Device
5962-9758601Q2A
Status
(1)
Package Type Package Pins Package
Drawing
Qty
LCCC
FK
20
1
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C)
-55 to 125
Device Marking
(4/5)
Samples
ACTIVE
TBD
POST-PLATE
N / A for Pkg Type
5962-
9758601Q2A
SNJ54F
244FK
5962-9758601QR
A
SNJ54F244J
5962-9758601QR
A
SNJ54F244J
5962-9758601QS
A
SNJ54F244W
5962-9758601QS
A
SNJ54F244W
JM38510/
33203B2A
JM38510/
33203B2A
JM38510/
33203BRA
JM38510/
33203BRA
JM38510/
33203BSA
JM38510/
33203BSA
JM38510/
33203B2A
JM38510/
33203B2A
JM38510/
33203BRA
5962-9758601QRA
ACTIVE
CDIP
J
20
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9758601QRA
ACTIVE
CDIP
J
20
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9758601QSA
ACTIVE
CFP
W
20
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9758601QSA
ACTIVE
CFP
W
20
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510/33203B2A
JM38510/33203B2A
JM38510/33203BRA
JM38510/33203BRA
JM38510/33203BSA
JM38510/33203BSA
M38510/33203B2A
M38510/33203B2A
M38510/33203BRA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
LCCC
CDIP
CDIP
CFP
CFP
LCCC
LCCC
CDIP
FK
FK
J
J
W
W
FK
FK
J
20
20
20
20
20
20
20
20
20
1
1
1
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE
POST-PLATE
A42
A42
A42
A42
POST-PLATE
POST-PLATE
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
Addendum-Page 1
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
