KM23V16000C(E)T
16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM
FEATURES
¡Ü
Preliminary
PRELIMINARY
CMOS MASK ROM
GENERAL DESCRIPTION
The KM23V16000C(E)T is a fully static mask programmable
ROM fabricated using silicon gate CMOS process technology,
and is organized either as 2,097,152 x 8 bit(byte mode) or as
1,048,576 x 16 bit(word mode) depending on BHE voltage
level.(See mode selection table)
This device operates with 2.7V ~3.6V power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The KM23V16000C(E)T is packaged in a 44-TSOP2.
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Switchable organization
2,097,152 x 8(byte mode)
1,048,576 x 16(word mode)
Fast access time
3.3V operation : 120ns(max.)
3.0V operation : 150ns(max.)
Supply voltage : 2.7V to 3.6V
Current consumption
Operating : 30/25mA(max.)
Standby : 30
§Ë
(max.)
Fully static operation
All inputs and outputs TTL compatible
Three state outputs
Package
-. KM23V16000C(E)T : 44-TSOP2-400
FUNCTIONAL BLOCK DIAGRAM
A
19
.
.
.
.
.
.
.
.
A
0
A
-1
. . .
CE
OE
BHE
Pin Name
A
0
- A
19
Q
0
- Q
14
Q
15
/A
-1
BHE
CE
OE
V
CC
V
SS
N.C
Data Outputs
Output 15(Word mode)/
LSB Address(Byte mode)
Word/Byte selection
Chip Enable
Output Enable
Power
Ground
No Connection
Pin Function
Address Inputs
CONTROL
LOGIC
X
BUFFERS
AND
DECODER
MEMORY CELL
MATRIX
(1,048,576x16/
2,097,152x8)
PRODUCT INFORMATION
Product
KM23V16000CT
KM23V16000CET
Operating
Temp Range
0
¡É
~70
¡É
-20
¡É
~85
¡É
Vcc Range
(Typical)
3.3V/3.0V
Speed
(ns)
120/150
PIN CONFIGURATION
Y
BUFFERS
AND
DECODER
SENSE AMP.
DATA OUT
BUFFERS
N.C
A
18
A
17
A
7
A
6
A
5
1
2
3
4
5
6
7
8
9
44 N.C
43 A
19
42 A
8
41 A
9
40 A
10
39 A
11
38 A
12
37 A
13
36 A
14
35 A
15
34 A
16
33 BHE
32 V
SS
31 Q
15
/A
-1
30 Q
7
29 Q
14
28 Q
6
27 Q
13
26 Q
5
25 Q
12
24 Q
4
23 V
CC
Q
0
/Q
8
Q
7
/Q
15
A
4
A
3
A
2
A
1
10
A
0
11
CE 12
V
SS
13
OE 14
Q
0
15
Q
8
16
Q
1
17
Q
9
18
Q
2
19
Q
10
20
Q
3
21
Q
11
22
TSOP
KM23V16000C(E)T
KM23V16000C(E)T
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on Any Pin Relative to V
SS
Temperature Under Bias
Storage Temperature
Operating Temperature
Symbol
V
IN
T
BIAS
T
Stg
T
A
Rating
-0.3 to +4.5
-55 to +150
-55 to +150
0 to +70
-20 to +85
Unit
V
Preliminary
PRELIMINARY
CMOS MASK ROM
Remark
-
-
-
KM23V16000CT
KM23V16000CET
¡É
¡É
¡É
¡É
NOTE
: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(Voltage reference to V
SS
)
Item
Supply Voltage
Supply Voltage
Symbol
V
CC
V
SS
Min
2.7/3.0
0
Typ
3.0/3.3
0
Max
3.3/3.6
0
Unit
V
V
DC CHARACTERISTICS
Parameter
Operating Current
Standby Current(TTL)
Standby Current(CMOS)
Input Leakage Current
Output Leakage Current
Input High Voltage, All Inputs
Input Low Voltage, All Inputs
Output High Voltage Level
Output Low Voltage Level
Symbol
I
CC
I
SB1
I
SB2
I
LI
I
LO
V
IH
V
IL
V
OH
V
OL
I
OH
= -400
§Ë
I
OL
= 2.1mA
Test Conditions
CE=OE=V
IL
all
outputs open
V
CC
=3.3V
¡¾
0.3V
V
CC
=3.0V
¡¾
0.3V
Min
-
Max
30
25
500
30
-
-
2.0
-0.3
2.4
-
10
10
V
CC
+0.3
0.6
-
0.4
Unit
mA
mA
CE=V
IH
, all outputs open
CE=V
CC
, all outputs open
V
IN
=0 to V
CC
V
OUT
=0 to V
CC
§Ë
§Ë
§Ë
§Ë
V
V
V
V
NOTE
: Minimum DC Voltage(V
IL
) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns.
Maximum DC voltage on input pins(V
IH
) is V
CC
+0.3V which, during transitions, may overshoot to V
CC
+2.0V for periods <20ns.
MODE SELECTION
CE
H
L
L
OE
X
H
L
BHE
X
X
H
L
Q
15
/A
-1
X
X
Output
Input
Mode
Standby
Operating
Operating
Operating
Data
High-Z
High-Z
Q
0
~Q
15
: Dout
Q
0
~Q
7
: Dout
Q
8
~Q
14
: Hi-Z
Power
Standby
Active
Active
Active
CAPACITANCE
( T
A
=25
¡É
, f=1.0MHz)
Item
Output Capacitance
Input Capacitance
Symbol
C
OUT
C
IN
Test Conditions
V
OUT
=0V
V
IN
=0V
MIN
-
-
Max
12
12
Unit
pF
pF
NOTE
: Capacitance is periodically sampled and not 100% tested.
KM23V16000C(E)T
AC CHARACTERISTICS
(V
CC
= 3.3V/3.0V
¡¾
0.3V, unless otherwise noted.)
TEST CONDITIONS
Item
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Levels
Output Loads
Value
0.45V to 2.4V
10ns
1.5V
Preliminary
PRELIMINARY
CMOS MASK ROM
1 TTL Gate and C
L
=100pF
READ CYCLE
Item
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
Output or Chip Disable to
Output High-Z
Output Hold from Address Change
Symbol
tRC
tACE
tAA
tOE
tDF
tOH
0
V
CC
= 3.3V
¡¾
0.3V
Min
120
120
120
60
20
0
Max
V
CC
= 3.0V
¡¾
0.3V
Min
150
150
150
70
30
Max
Unit
ns
ns
ns
ns
ns
ns
TIMING DIAGRAM
READ
ADD
A
0
~A
20
A
-1(*1)
t
ACE
ADD1
t
RC
ADD2
t
DF(*3)
CE
t
OE
t
AA
OE
D
OUT
D
0
~D
7
D
8
~D
15(*2)
t
OH
VALID DATA
VALID DATA
NOTES :
*1. Byte Mode only. A
-1
is Least Significant Bit Address.(BHE = V
IL
)
*2. Word Mode only.(BHE = V
IH
)
*3. tDF is defined as the time at which the outputs achieve the open circuit condition and is not
referenced to V
OH
or V
OL
level.
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