FUJITSU SEMICONDUCTOR
DATA SHEET
8-bit Proprietary Microcontroller
CMOS
F
2
MC-8L MB89530H Series
MB89537H/537HC/538H/538HC/P538/PV530
s
DESCRIPTION
The MB89530H series has been developed as a general-purpose version of the F
2
MC*-8L family consisting of
proprietary 8-bit, single-chip microcontrollers.
In addition to a compact instruction set, the microcontroller contains a variety of peripheral functions such as
I
2
C interface, 8-bit PWM,16-bit timer, 21-bit timer/counter, 8-bit PWC, 17-bit watch prescalar, UART, Serial I/O,
6-bit PPG, 12-bit PPG , an A/D converter, and external interrupt( level and edge), watch timer reset..
*: F
2
MC stands for FUJITSU Flexible Microcontroller.
s
FEATURES
• Various package options
Three types of QFP packages ( 1-mm, 0.65-mm, or 0.5-mm lead pitch)
SH-DIP package
• High-speed operating capability at low voltage
• Minimum execution time: 0.32
µs/12.5MHz
• F
2
MC-8L family CPU core
Multiplication and division instructions
16-bit arithmetic operations
Test and branch instructions
Bit manipulation instructions, etc.
Instruction set optimized for controllers
• Dual-clock control system
Main clock: 12.5MHz ; Subclock: 32.768KHz
• Five types of timers
8-bit PWM timer: 2 channels timers (also usable as a interval timer)
16-bit timer/counter
21-bit time-base timer
8 bit PWC timer operation
Watch prescaler (17 bits)
• UART
CLK-synchronous/CLK-asynchronous data transfer capable
• Serial interface
Switchable transfer direction allows communication with various equipment.
• 10-bit A/D converter (8 channels)
Activation by timebase timer , external trigger or software.
(Continued)
MB89530H Series
(Continued)
• Two Type of progammable Pulse Generator (PPG)
6-bit PPG with program-selectable pulse width and period.
12-bit PPG (2 channels) with program-selectable pulse width and period.
• I
2
C interface circuit
• External interrupt 1: 4 channels
Four channels are independent and capable of wake-up from low-power consumption modes (with an edge
detection function).
• External interrupt 2: 8 channels
Eight channels are independent and capable of wake-up from low-power consumption modes (with a
low level Ldetection function).
• Low-power consumption modes
Stop mode (Oscillation stops to minimize the current consumption.)
Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
Subclock mode
Watch mode
• Watch dog timer reset
• I/O ports: max. 53 channels
s
PACKAGE
64-pin Plastic LQFP
64-pin Plastic QFP
64-pin Plastic QFP
(FPT-64P-M06)
(FPT-64P-M09)
(FPT-64P-M03)
(FPT-64P-M06)
(FPT-64P-M09)
64-pin Plastic SH-DIP
64-pin Ceramic MDIP
64-pin Ceramic MQFP
(DIP-64P-M01)
(MDP-64C-P02)
(MQP-64C-P01)
(DIP-64P-M01)
(MDP-64C-P02)
(MQP-64C-P01)
2
MB89530H Series
s
PRODUCT LINEUP
Part number
Parameter
Classification
ROM size
RAM size
CPU functions
MB89537H
MB89537HC
MB89538H
MB89538HC
MB89P538
OTP
48 K
×
8 bits
2K
×
8 bits
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8, 16 bits
: 0.32
µs/12.5
MHz
: 2.88
µs/12.5
MHz
: 5 pins
: 8 pins
: 2 pins
: 38 pins
: 53 pins
Dual/Single
Yes
8 bits reload timer operation(toggled output capable, operating clock cycle: 1, 8, 16, 64 tinst).
8 bits resolution PWM operation( conversion cycle:256 tinst to 256 X 64 tinst)
2 channels or combine to 1 channel with channel 1 being the count clock of channel 2.
MB89PV530
Piggy-back
Mass production products
(mask ROM product)
32 K x 8 bits
1K x 8 bits
Number of instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Minimum interrupt processing time:
Input port
Output-only ports (CMOS)
I/O ports (N-channel open drain)
I/O ports (CMOS)
Total
Ports
Clock
Wild Register
PWM Timer
8 bits timer operation (underflow output capable, operating clock cycle:1, 4, 32 tinst, external)
Pulse width count timer 8 bits reload timer (toggled output capable, operating clock cycle: 1, 4, 32 tinst, external)
8 bits pulse-width measurement
6-bit PPG
12-bit PPG
I
2
C interface
16-bit Timer/Counter
Internal 6-bit counter
Output frequency: pulse width and cycle are program selectable
2 channels, Internal 12-bit counter
Output frequency: pulse width and cycle are program selectable
MB89537H/MB89538H do not have I
2
C interface.
1 channel, Use a 2-wire protocol to communicate with other device
16-bit timer operation (operating clock period: 1 t
inst
, external)
16-bit event counter operation (rising, falling, or both edges can be selected)
16 bits x 1 channel
8-bit length; Selectable LSB-first or MSB-first; 4 shift clock mode selectable
Transfer data length: 7, 8 bits for UART, 8 bits for SIO
support sub-clock mode
CLK-synchronous/CLK-asynchronous data transfer capable
(4,6,7 and 8 bits with parity bit ; 5,7,8 and 9 bits without parity bit)
Edge detection of 4 external sources; Interrupt can be generated at the same time flag is set; Can
be used to release the sleep or stop mode.
8 external interrupt input (level interrupt); Available for the wake up interrupt input.
10-bit resolution
×
8 channels ( conversion time: 60 tinst )
A/D conversion function Supports repeated activation by an external or internal clock.
Reference voltage input provided (AVR).
Sleep mode, stop mode and clock mode
CMOS
3.5V ~ 5.5V
2.2V ~ 5.5 V
Serial I/O
UART/SIO
UART
External interrupt 1
External interrupt 2
A/D converter
Standby mode
Process
Operating Voltage
Note : 1 tinst = one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main
clock, or 1/2 of the subclock if subclock mode is selected.
3
MB89530H Series
s
PACKAGE AND CORRESPONDING PRODUCTS
Models
MB89537H/
537HC
Package
DIP-64P-M01
FPT-64P-M03
FPT-64P-M06
FPT-64P-M09
MDP-64C-P02
MQP-64P-P01
MB89538H/
538HC
MB89P538
MB89PV530
O
O
O
O
X
X
X
O
X
O
X
X
O
X
O
O
X
X
X
X
X
X
O
O
O : Availabe X : Not available
s
DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the OTPROM (one-time PROM) products, verify its differences from the product that
will actually be used. Take particular care on the following points:
• The number of register banks available is different between the MB89PV530 and the MB89537H/538H/P538.
• The stack area, etc., is set at the upper limit of the RAM.
2. Current Consumption
• For the MB89PV530, add the current consumed by the EPROM mounted in the piggy-back socket.
• When operating at low speed, the current consumed by the one-time PROM product is greater than for the
mask ROM product. However, the current consumption are roughly the same in sleep or stop mode.
• (For more information, see “s Electrical Characteristics.”)
3. Mask Options
The functions available as options and the method of specifying options differ between products.
Before using options check “s Mask Options.”
4. Functionalities different between products in MB89530 series
Functionalities
Power-on reset wait time
Wait time for
external reset in stop/sub/clock mode
or
wait time for
external interrupt trigger recover from main
stop mode
Port pin pull up resistors
AD conversion time
MB89537H/537HC/538H/538HC
Regulator stab. time + Regulator
recovery. time + Osc. stab. time
MB89P538
Regulator stab. time +
Osc. stab. time
MB89PV530
Osc. stab. time
Regulator recovery time + Osc.
stab. time
Osc. stab. time
Selectable by software.
60 t
inst
*
Always available independent of ICCR:DMBP bit selection.
Not available.
I C noise cancelling circuit
2
Not available when
ICCR:DMBP bit is
asserted.
Note:For more information on t
inst
see “s Electrical Characteristics (4) Instruction cycles"
4
MB89530H Series
s
PIN ASSIGNMENT
(TOP VIEW)
P36/WTO
P37/PTO1
P40/INT20/EC
P41/INT21/SCK2
P42/INT22/SO2/SDA
P43/INT23/SI2/SCL
P44/INT24/UCK2
P45/INT25/UO2
P46/INT26/UI2
P47/INT27/ADST
P50/AN0
P51/AN1
P52/AN2
P53/AN3
P54/AN4
P55/AN5
P56/AN6
P57/AN7
AV
CC
AVR
AV
SS
P60/INT10
P61/INT11
P62/INT12
P63/INT13/X0A
P64/X1A
RST
MOD0
MOD1
X0
X1
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
V
PP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O1
O2
O3
V
SS
65
66
67
68
69
70
71
72
73
74
75
76
77
78
92
91
90
89
88
87
86
85
84
83
82
81
80
79
V
CC
A14
A13
A8
A9
A11
OE
A10
CE
O8
O7
O6
O5
O4
The area inside the
dotted line is for the
MB89PV530 only.
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
V
CC
P35/PWC
P34/PTO2
P33/SI1(UI1)
P32/SO1(UO1)
P31/SCK1(UCK1)/LMCO
P30/PPG03/MCO
C
P00
P01
P02
P03
P04
P05
P06
P07
P10
P11
P12
P13
P14
P15
P16
P17
P20/PWCK
P21/PPG01
P22/PPG02
P23
P24
P25
P26
P27
(DIP-64P-M01)
(MDP-64C-P02)
5
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