TS75C96
V.32, V.29, V.27ter, V.22bis, V.22, V.23,
BELL 212A, BELL 103 MODEM CHIP SET
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ADVANCE DATA
CCITT V.32, V.22bis, V.22, V.21, V.23,
Bell 212A, Bell 103 COMPATIBLE MODEM
CHIP SET
CCITT V.29, V.27ter FOR FAX APPLICA-
TIONS
INTEGRATED IMPLEMENTATION ON THREE
DSP AND THREE MAFE CHIPS
FULL DUPLEX OPERATION FROM 9600 TO
300bps
FULL IMPLEMENTATION OF THE V.32 AND
V.22bis HANDSHAKE
V.29/4800bps AND V.27ter SHORT TRAIN SE-
QUENCES
DYNAMIC RANGE : 43dB
TWO SATELLITE HOPS AND FREQUENCY
OFFSET CAPABILITIES (10Hz) FOR THE
FAR END ECHO CANCELLER IN V.32 MODE
TRELLIS ENCODING AND VITERBI DECOD-
ING
12.5% ROLL-OFF RAISED COSINE TRANS-
MITTER PULSE SHAPING
HIGH PERFORMANCE PASSBAND FRAC-
TIONALLY SPACED ADAPTIVE EQUALIZER
SIGNAL QUALITY MONITORING
PARALLEL INTERFACE TO STANDARD MI-
CROPROCESSORS
SERIAL DATA TRANSMIT CAPABILITY
V.14 AND V.54 IMPLEMENTATION
LOW POWER MODE AVAILABLE (PLCC)
BIT RATE DATA CLOCKS PROVIDED FOR
SYNCHRONOUS DATA TRANSFER
FULL DIAGNOSTIC CAPABILITY
DTMF GENERATION
CALL PROGRESS TONE DETECTION
PROGRAMMABLE FILTERS FOR ”AUTO-
BAUD” IMPLEMENTATION
SOFTWARE LICENSE AND DEVELOPMENT
TOOLS AVAILABLE FOR EASY CUSTOMIZA-
TION
TOTAL POWER CONSUMPTION BELOW
1.5W
DESCRIPTION
The SGS-THOMSON Microelectronics TS75C96
chip set is a highly integrated modem engine, which
can operate in full duplex from 9600 to 300bps. The
modem hardware consists of three analog front
end (MAFE) chips, three DSP processor chips and
additionalmemory chips plus the V.14 serial output
converter.The three SGS-THOMSON analog front
end chips (TS68950/1/2)are the transmit interface,
the receive interface and the clock generator re-
spectively.The modem signal processing functions
are implemented on three ST18930 programmable
digital signal processors.
DIP24
(Plastic Package)
DIP28
(Plastic Package)
DIP48
(Plastic Package)
PLCC28
(Plastic Chip Carrier)
PLCC52
(Plastic Chip Carrier)
See Order Codes on Page 4
February 1995
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without no tice.
1/47
TS75C96
ORDER CODES
Part Number
TS75C960CP-S
TS75C961CP-S
TS75C962CP-S
TS68950CP
TS68951CP
TS68952CP
Temperature Range
o
o
0 C to + 70 C
o
o
0 C to + 70 C
o
o
0 C to + 70 C
o
o
0 C to + 70 C
o
o
0 C to + 70 C
0
o
C to + 70
o
C
Package
DIP48
DIP48
DIP48
DIP24
DIP28
DIP28
Part Number
TS7538CP
TS75C960CFN-S
TS75C961CFN-S
TS75C962FN-S
TS68950CFN
TS68951CFN
Temperature Range
o
o
0 C to + 70 C
o
o
0 C to + 70 C
o
o
0 C to + 70 C
o
o
0 C to + 70 C
o
o
0 C to + 70 C
0
o
C to + 70
o
C
Package
DIP28
PLCC52
PLCC52
PLCC52
PLCC28
PLCC28
PIN DESCRIPTION
SYSTEM INTERFACE
Pin Name
Type
Signal Name
Description
System Data Bus : these lines are used for data transfer between the
TS75C96 mailbox and the host processor
Chip Select : this input is asserted when the TSC75C96 is to be accessed by
the host processor
Register Select : this signal is used to control the data transfers between the
host processor and the TS75C96 mailbox
System Data Strobe : synchronizes the transfer between the TS75C96
mailbox and the host processor
System Read/Write : control signal for the TSC75C96 mailbox operation
Interrupt Request : signal sent to the host processor to access the TS75C96
mailbox
Master Reset (All DSP’s RESET connected to this pin)
TS75C961 (DSP # 1 Transmitter and Handshake)
AD0..AD7
CS
RS
SDS
SR/W
IRQ
RESET
I/O
I
I
I
I
O
I
D0H..D7H
CSL
RSL
DSL
RWL
INTL
RSTL1
DATA INTERFACE
Pin Name
TS7538
TxD
RxD
I
O
TxD
RxD
Serial Transmit Data
Serial Receive Data
Type
Signal Name
Description
ANALOG INTERFACE
Pin Name
ATO
RAI
LEI
Type
O
I
I
Signal Name
ATO
RAI
LEI
Analog Transmit Output
Receive Analog Input
Local Echo Input. Must be grounded.
Description
TS68950 (Analog Front-end Transmitter)
TS68951 (Analog Front-end Receiver)
CLOCK INTERFACE
Pin Name
TxCLK
TxRCLK
TxCCLK
TxMCLK
RxCLK
RxRCLK
RxCCLK
RxMCLK
TxSCLK
4/47
Type
O
O
O
O
O
O
O
O
I
Signal Name
TxCLK
TxRLCK
TxCCLK
TxMCLK
RxCLK
RxRCLK
RxCCLK
RxMCLK
TxSCLK
Description
Transmit Bit Clock
Transmit Baud Clock
Transmit Conversion Clock
Transmit Multiplex Clock
Receive Bit Clock
Receive Baud Clock
Receive Conversion Clock
Receive Multiplex Clock
Transmit Synchro Clock : can be used to synchronize the transmitter on an
external bit clock provided by the RS232C (or V.24) junction
TS68952 (Analog Front-end Clock Generator)
75C96-02.TBL
75C96-01.TBL
TS75C96
ABSOLUTE MAXIMUM RATINGS
Symbol
TS75C960/1/2
V
CC
(1)
V
IN
(1)
T
amb
T
stg
TS68950/1/2
Supply Voltage between V + and AGND or DGND
Supply Voltage between V – and AGND or DGND
Voltage between AGND and DGND
Digital Input Voltage
Digital Output Voltage
Digital Output Current
Analog Input Voltage
Analog Output Voltage
Analog Output Current
T
oper
T
stg
Operating Temperture
Storage Temperture
–0.3, +7
–7, +0.3
–0.3, +0.3
DGND –0.3, V
CC+
+ 0.3
DGND –0.3, V
CC
+ 0.3
–20, + 20
V
CC
–0.3, V
CC+
+ 0.3
V
CC
–0.3, V
CC
+ 0.3
–10, + 10
0, + 70
–65, + 150
+
+
Parameter
Value
Unit
Supply Voltage
Input Voltage
Operating Temperature
Storage Temperature
–3.0, 7.0
–3.0, 7.0
0, + 70
–55, + 150
V
V
o
o
C
C
V
V
V
V
V
mA
V
V
o
o
C
C
Note :
1. With respect to V
SS
.
Stresses above those hereby listed may cause permanent damage to the device. The ratings are stress ones only and functional operation
of the device at these or any conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to
maximum rating conditions for extended periods may affect device reliability. Standard MOS circuits handling procedure should be used to
avoid possible damage to the device.
DC ELECTRICAL CHARACTERISTICS
(DGND = AGND = 0V)
Symbol
Parameter
o
Min.
Typ.
Max.
Unit
DIGITAL SUPPLY (V
CC
= 5.0V
±10%,
V
SS
= 0V, T
amb
= 0 to +70 C, unless otherwise specified)
V
CC
V
IL
V
IH
I
i
V
OH
V
OL
P
D
C
in
I
TSI
V
+
V
-
I
+
-
Supply Voltage
Input Low Voltage
Input High Voltage
Input Extal Current
Output High Voltage (I
load
=–300
µA)
Output Low Voltage (I
load
=3.2 mA)
Total Power Dissipation
Input Capacitance
Three State (Off State) Input Current
4.5
–0.3
2.4
–50
2.7
5
5.5
0.8
V
CC
+50
0.5
V
v
V
µA
V
V
W
pF
1.0
10
–20
–20
mA
ANALOG SUPPLY
Positive Power Supply
Negative Power Supply
Positive Supply Current
Negative Supply Current
-35
4.75
-5.25
5.25
4.75
35
V
mA
mA
75C96-04.TBL
V
I
Note :
Case Temperature T must be mantained below 100
o
C.
5/47
75C96-03.TBL
mA
PCB设计
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