Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
†
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN74HC86-Q1
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCLS587C − JUNE 2004 − REVISED APRIL 2008
recommended operating conditions (see Note 3)
MIN
V
CC
V
IH
Supply voltage
V
CC
= 2 V
High level
High-level input voltage
V
CC
= 4.5 V
V
CC
= 6 V
V
CC
= 2 V
V
IL
V
I
V
O
∆t/∆v
T
A
Low-level input voltage
Low level
Input voltage
Output voltage
V
CC
= 2 V
Input transition rise/fall time
Operating free-air temperature
V
CC
= 4.5 V
V
CC
= 6 V
−40
V
CC
= 4.5 V
V
CC
= 6 V
0
0
2
1.5
3.15
4.2
0.5
1.35
1.8
V
CC
V
CC
1000
500
400
125
°C
ns
V
V
V
V
NOM
5
MAX
6
UNIT
V
NOTE 3: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
CC
2V
I
OH
= −20
µA
20
V
OH
V
I
= V
IH
or V
IL
I
OH
= −4 mA
I
OH
= −5.2 mA
I
OL
= 20
µA
V
OL
V
I
= V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 5.2 mA
I
I
I
CC
C
i
V
I
= V
CC
or 0
V
I
= V
CC
or 0,
I
O
= 0
4.5 V
6V
4.5 V
6V
2V
4.5 V
6V
4.5 V
6V
6V
6V
2 V to 6 V
T
A
= −405C
TO 1255C
MIN
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1000
40
10
MAX
T
A
= −405C
TO 855C
MIN
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1000
20
10
nA
µA
pF
V
V
MAX
UNIT
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
SN74HC86-Q1
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCLS587C − JUNE 2004 − REVISED APRIL 2008
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
V
CC
2V
t
pd
A or B
Y
4.5 V
6V
2V
t
t
Y
4.5 V
6V
T
A
= −405C
TO 1255C
MIN
MAX
150
30
25
110
22
19
T
A
= −405C
TO 855C
MIN
MAX
125
25
21
95
19
16
ns
ns
UNIT
operating characteristics, T
A
= 25°C
PARAMETER
C
pd
Power dissipation capacitance per gate
TEST CONDITIONS
No load
TYP
35
UNIT
pF
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
C
L
= 50 pF
(see Note A)
In-Phase
Output
V
CC
Input
50%
t
PLH
50%
10%
t
PHL
Out-of-Phase
Output
90%
50%
10%
t
f
90%
t
r
Input
50%
10%
90%
90%
V
CC
50%
10% 0 V
t
f
t
PLH
50%
10%
90%
t
r
V
OH
V
OL
50%
0V
t
PHL
90%
V
OH
50%
10%
V
OL
t
f
LOAD CIRCUIT
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. C
L
includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR
≤
1 MHz, Z
O
= 50
Ω,
t
r
= 6 ns, t
f
= 6 ns.
C. The outputs are measured one at a time, with one input transition per measurement.
D. t
PLH
and t
PHL
are the same as t
pd
.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
•
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PACKAGE OPTION ADDENDUM
www.ti.com
25-Mar-2015
PACKAGING INFORMATION
Orderable Device
SN74HC86IDRG4Q1
SN74HC86IDRQ1
SN74HC86IPWRG4Q1
SN74HC86IPWRQ1
SN74HC86QDRG4Q1
SN74HC86QDRQ1
SN74HC86QPWRG4Q1
SN74HC86QPWRQ1
Status
(1)
Package Type Package Pins Package
Drawing
Qty
SOIC
SOIC
TSSOP
TSSOP
SOIC
SOIC
TSSOP
TSSOP
D
D
PW
PW
D
D
PW
PW
14
14
14
14
14
14
14
14
2000
2000
2500
2000
2500
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Device Marking
(4/5)
Samples
ACTIVE
OBSOLETE
ACTIVE
OBSOLETE
ACTIVE
OBSOLETE
ACTIVE
ACTIVE
Green (RoHS
& no Sb/Br)
TBD
Green (RoHS
& no Sb/Br)
TBD
Green (RoHS
& no Sb/Br)
TBD
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
CU NIPDAU
Call TI
CU NIPDAU
Call TI
CU NIPDAU
Call TI
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Call TI
Level-1-260C-UNLIM
Call TI
Level-1-260C-UNLIM
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
HC86I
HC86I
HC86Q
HC86Q
HC86Q
HC86Q
(1)
The marketing status values are defined as follows:
ACTIVE:
Product device recommended for new designs.
LIFEBUY:
TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND:
Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW:
Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE:
TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent
for the latest availability
information and additional product content details.
TBD:
The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS):
TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt):
This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br):
TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
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