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IDT74FCT827ATEG

产品描述Bus Driver, FCT Series, 1-Func, 10-Bit, True Output, CMOS, CDFP24, CERPACK-24
产品类别逻辑    逻辑   
文件大小146KB,共7页
制造商IDT (Integrated Device Technology)
标准  
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IDT74FCT827ATEG概述

Bus Driver, FCT Series, 1-Func, 10-Bit, True Output, CMOS, CDFP24, CERPACK-24

IDT74FCT827ATEG规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
零件包装代码DFP
包装说明CERPACK-24
针数24
Reach Compliance Codecompliant
其他特性WITH DUAL OUTPUT ENABLE
系列FCT
JESD-30 代码R-GDFP-F24
JESD-609代码e3
负载电容(CL)300 pF
逻辑集成电路类型BUS DRIVER
位数10
功能数量1
端口数量2
端子数量24
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料CERAMIC, GLASS-SEALED
封装代码DFP
封装形状RECTANGULAR
封装形式FLATPACK
峰值回流温度(摄氏度)260
传播延迟(tpd)15 ns
认证状态Not Qualified
座面最大高度2.286 mm
最大供电电压 (Vsup)5.25 V
最小供电电压 (Vsup)4.75 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层MATTE TIN
端子形式FLAT
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
宽度9.144 mm
Base Number Matches1

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IDT54/74FCT827AT/BT/CT/DT
FAST CMOS 10-BIT BUFFER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS
10-BIT BUFFER
IDT54/74FCT827AT/BT/CT/DT
FEATURES:
Low input and output leakage
≤1µ
A (max.)
Extended commercial range of –40°C to +85°C
CMOS power levels
True TTL input and output compatibility
V
OH
= 3.3V (typ.)
V
OL
= 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation Enhanced
versions
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Available in DIP, SOIC, SSOP, QSOP, TSSOP, CERPACK, and
LCC packages
A, B, C and D speed grades
High drive outputs (-15mA I
OH
, 48mA I
OL
)
DESCRIPTION:
The FCT827T is built using an advanced dual metal CMOS technology.
The FCT827T 10-bit bus drivers provide high-performance bus inter-
face buffering for wide data/address paths or buses carrying parity. The 10-
bit buffers have NAND-ed output enables for maximum control flexibility.
All of the FCT827T high-performance interface family are designed for
high-capacitance load drive capability, while providing low-capacitance
bus loading at both inputs and outputs. All inputs have clamp diodes to
ground and all outputs are designed for low-capacitance bus loading in
high-impedance state.
FUNCTIONAL BLOCK DIAGRAM
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
OE
1
OE
2
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
c
1999 Integrated Device Technology, Inc.
MARCH 2000
DSC-5484/-

 
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