SN54AC08, SN74AC08
QUADRUPLE 2 INPUT POSITIVE AND GATES
SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003
D
2-V to 6-V V
CC
Operation
D
Inputs Accept Voltages to 6 V
D
Max t
pd
of 7.5 ns at 5 V
SN54AC08 . . . J OR W PACKAGE
SN74AC08 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AC08 . . . FK PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4B
4A
4Y
3B
3A
3Y
1Y
NC
2A
NC
2B
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
1B
1A
NC
VCC
4B
4A
NC
4Y
NC
3B
NC − No internal connection
ORDERABLE
PART NUMBER
SN74AC08N
SN74AC08D
SN74AC08DR
SN74AC08NSR
SN74AC08DBR
SN74AC08PW
SN74AC08PWR
SNJ54AC08J
SNJ54AC08W
SNJ54AC08FK
AC08
SNJ54AC08J
SNJ54AC08W
SNJ54AC08FK
AC08
AC08
AC08
Tube
Tube
Tape and reel
Tape and reel
Tape and reel
Tube
Tape and reel
Tube
Tube
Tube
FUNCTION TABLE
(each gate)
INPUTS
B
H
X
L
OUTPUT
Y
H
L
L
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
description/ordering information
The ’AC08 devices are quadruple 2-input positive-AND gates. These devices perform the Boolean function
Y = A
B or Y = A + B in positive logic.
ORDERING INFORMATION
TA
PDIP − N
SOIC − D
−40 C 85°C
−40°C to 85 C
SOP − NS
SSOP − DB
TSSOP − PW
CDIP − J
−55 C 125°C
−55°C to 125 C
CFP − W
LCCC − FK
PACKAGE†
TOP-SIDE
MARKING
SN74AC08N
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
A
H
L
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
2Y
GND
NC
3Y
3A
1
SN54AC08, SN74AC08
QUADRUPLE 2 INPUT POSITIVE AND GATES
SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003
logic diagram, each gate (positive logic)
A
Y
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
+ 0.5 V
Output voltage range, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
+ 0.5 V
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±20
mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±20
mA
Continuous output current, I
O
(V
O
= 0 to V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±50
mA
Continuous current through V
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±200
mA
Package thermal impedance,
θ
JA
(see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54AC08
MIN
VCC
VIH
Supply voltage
VCC = 3 V
VCC = 4.5 V
VCC = 5.5 V
VCC = 3 V
VIL
VI
VO
IOH
Low-level input voltage
Input voltage
Output voltage
VCC = 3 V
VCC = 4.5 V
VCC = 5.5 V
VCC = 3 V
IOL
∆t/∆v
Low-level output current
Input transition rise or fall rate
VCC = 4.5 V
VCC = 5.5 V
VCC = 4.5 V
VCC = 5.5 V
0
0
2
2.1
3.15
3.85
0.9
1.35
1.65
VCC
VCC
−12
−24
−24
12
24
24
8
0
0
MAX
6
SN74AC08
MIN
2
2.1
3.15
3.85
0.9
1.35
1.65
VCC
VCC
−12
−24
−24
12
24
24
8
ns/V
mA
mA
V
V
V
V
MAX
6
UNIT
V
High-level input voltage
High-level output current
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN54AC08, SN74AC08
QUADRUPLE 2 INPUT POSITIVE AND GATES
SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
3V
IOH = −50
µA
IOH = −12 mA
IOH = −24 mA
IOH = −50 mA†
IOH = −75 mA†
IOL = 50
µA
IOL = 12 mA
IOL = 24 mA
IOL = 50 mA†
IOL = 75 mA†
II
A or B ports
VI = VCC or GND
4.5 V
5.5 V
3V
4.5 V
5.5 V
5.5 V
5.5 V
3V
4.5 V
5.5 V
3V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
±0.1
±1
40
VOL
0.002
0.001
0.001
0.1
0.1
0.1
0.36
0.36
0.36
0.1
0.1
0.1
0.5
0.5
0.5
1.65
1.65
±1
20
µA
µA
pF
VOH
TA = 25°C
MIN
TYP
MAX
2.9
4.4
5.4
2.56
3.86
4.86
SN54AC08
MIN
2.9
4.4
5.4
2.4
3.7
4.7
3.85
3.85
0.1
0.1
0.1
0.44
0.44
0.44
V
MAX
SN74AC08
MIN
2.9
4.4
5.4
2.46
3.76
4.76
V
MAX
UNIT
ICC
VI = VCC or GND,
IO = 0
5.5 V
2
Ci
VI = VCC or GND
5V
4.5
† Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
switching characteristics over recommended operating free-air temperature range,
V
CC
= 3.3 V
"
0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
A or B
TO
(OUTPUT)
Y
TA = 25°C
MIN
TYP
MAX
1.5
1.5
7.5
7
9.5
8.5
SN54AC08
MIN
1
1
MAX
12.5
11.5
SN74AC08
MIN
1
1
MAX
10
9
UNIT
ns
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
"
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
A or B
TO
(OUTPUT)
Y
TA = 25°C
MIN
TYP
MAX
1.5
1.5
5.5
5.5
7.5
7
SN54AC08
MIN
1
1
MAX
9
8.5
SN74AC08
MIN
1
1
MAX
8.5
7.5
UNIT
ns
operating characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST CONDITIONS
CL = 50 pF,
f = 1 MHz
TYP
20
UNIT
pF
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
SN54AC08, SN74AC08
QUADRUPLE 2 INPUT POSITIVE AND GATES
SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
TEST
tPLH/tPHL
S1
Open
2
×
VCC
From Output
Under Test
CL = 50 pF
(see Note A)
500
Ω
S1
Open
In-Phase
Output
tPHL
Out-of-Phase
Output
LOAD CIRCUIT
50% VCC
Input
(see Note B)
tPLH
50% VCC
VCC
50% VCC
50 % VCC
0V
tPHL
VOH
50% VCC
VOL
tPLH
VOH
50% VCC
VOL
500
Ω
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
≤
1 MHz, ZO = 50
Ω,
tr
v
2.5 ns, tf
v
2.5 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
5962-87615012A
Status
(1)
Package Type Package Pins Package
Drawing
Qty
LCCC
FK
20
1
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C)
-55 to 125
Device Marking
(4/5)
Samples
ACTIVE
TBD
POST-PLATE
N / A for Pkg Type
5962-
87615012A
SNJ54AC
08FK
5962-8761501CA
SNJ54AC08J
5962-8761501DA
SNJ54AC08W
AC08
5962-8761501CA
5962-8761501DA
SN74AC08D
SN74AC08DBLE
SN74AC08DBR
SN74AC08DE4
SN74AC08DG4
SN74AC08DR
SN74AC08DRE4
SN74AC08DRG4
SN74AC08N
SN74AC08NE4
SN74AC08NSR
SN74AC08NSRG4
SN74AC08PW
ACTIVE
ACTIVE
ACTIVE
OBSOLETE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
SOIC
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
SO
TSSOP
J
W
D
DB
DB
D
D
D
D
D
N
N
NS
NS
PW
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
1
1
50
TBD
TBD
Green (RoHS
& no Sb/Br)
TBD
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Pb-Free
(RoHS)
Pb-Free
(RoHS)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
A42
A42
CU NIPDAU
Call TI
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
2000
50
50
2500
2500
2500
25
25
2000
2000
90
AC08
AC08
AC08
AC08
AC08
AC08
SN74AC08N
SN74AC08N
AC08
AC08
AC08
Addendum-Page 1
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