CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
TEST
CONDITIONS
PARAMETER
HC TYPES
High Level Input
Voltage
V
IH
-
-
2
4.5
6
Low Level Input
Voltage
V
IL
-
-
2
4.5
6
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
I
I
V
CC
or
GND
15
V
OL
V
IH
or V
IL
V
OH
V
IH
or V
IL
–0.02
–0.02
–0.02
–4
–5.2
0.02
0.02
0.02
4
5.2
-
-
2
4.5
6
4.5
6
2
4.5
6
4.5
6
6
6
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
3.98
5.48
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
0.1
0.1
0.1
0.26
0.26
±0.1
±0.5
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
±1
±5
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
±1
±5
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
SYMBOL
V
I
(V)
I
O
(mA)
V
CC
(V)
25
o
C
MIN
TYP
MAX
–40
o
C TO 85
o
C
MIN
MAX
–55
o
C TO
125
o
C
MIN
MAX
UNITS
3
CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050
DC Electrical Specifications
(Continued)
TEST
CONDITIONS
PARAMETER
Quiescent Device
Current
SYMBOL
I
CC
V
I
(V)
V
CC
or
GND
I
O
(mA)
0
25
o
C
MIN
-
TYP
-
MAX
2
–40
o
C TO 85
o
C
MIN
-
MAX
20
–55
o
C TO
125
o
C
MIN
-
MAX
40
UNITS
µA
V
CC
(V)
6
Switching Specifications
Input t
r
, t
f
= 6ns
TEST
CONDITIONS
C
L
= 50pF
25
o
C
V
CC
(V)
2
4.5
6
C
L
= 15pF
Transition Times (Figure 1)
t
TLH
, t
THL
C
L
= 50pF
5
2
4.5
6
Input Capacitance
Power Dissipation Capacitance
(Notes 2, 3)
NOTES:
2. C
PD
is used to determine the dynamic power consumption, per gate.
3. P
D
= V
CC2
f
i
(C
PD
+ C
L
) where f
i
= Input Frequency, C
L
= Output Load Capacitance, V
CC
= Supply Voltage.
C
I
C
PD
-
-
-
5
MIN
-
-
-
-
-
-
-
-
-
TYP
-
-
-
6
-
-
-
-
35
MAX
85
17
14
-
75
15
13
10
-
–40
o
C TO
85
o
C
MIN
-
-
-
-
-
-
-
-
-
MAX
105
21
18
-
95
19
16
10
-
–55
o
C TO
125
o
C
MIN
-
-
-
-
-
-
-
-
-
MAX
130
26
22
-
110
22
19
10
-
UNITS
ns
ns
ns
ns
ns
ns
ns
pF
pF
PARAMETER
HC TYPES
Propagation Delay,
nA to nY HC4049
nA to nY HC4050
SYMBOL
t
PLH,
t
PHL
Test Circuit and Waveform
t
r
= 6ns
INPUT
90%
50%
10%
t
TLH
90%
50%
10%
t
PHL
t
PLH
t
f
= 6ns
V
CC
GND
t
THL
INVERTING
OUTPUT
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC
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