19-1314; Rev 3; 9/04
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
General Description
The MAX3969 is a recommended upgrade for the
MAX3964, MAX3965, and MAX3968. The MAX3964A lim-
iting amplifier, with 2mV
P-P
input sensitivity and PECL
data outputs, is ideal for low-cost ATM, FDDI, and Fast
Ethernet fiber optic applications.
The MAX3964A features an integrated power detector
that senses the input-signal power. It provides a
received-signal-strength indicator (RSSI), which is an
analog indication of the power level and complementary
PECL loss-of-signal (LOS) outputs, which indicate when
the power level drops below a programmable threshold.
The threshold can be adjusted to detect signal ampli-
tudes as low as 2.7mV
P-P
. An optional squelch function
disables switching of the data outputs by holding them at
a known state during an LOS condition.
The MAX3965 provides the same functionality, but offers
TTL-compatible LOS outputs. The MAX3968 provides the
same functionality as the MAX3964A, but has data-output
edge speed suitable for ESCON and 266Mbps fibre
channel applications.
The MAX3964A/MAX3965/MAX3968 are available in die
form, as tested wafers, and in 20-pin QSOP packages.
The MAX3964AETP is available in a 20-pin thin QFN
package.
♦
Single Supply: +3.0V to +5.5V
♦
2mV
P-P
Input Sensitivity
♦
1.2ns Output Edge Speed
♦
Loss-of-Signal Detector with Programmable
Threshold
♦
Analog Received-Signal-Strength Indicator
♦
Output Squelch Function
♦
Choice of TTL or PECL LOS Outputs
♦
Compatible with 4B/5B Data Coding
IT
TION K
VALUA
E
BLE
AVAILA
Features
MAX3964A/MAX3965/MAX3968
Ordering Information
PART
MAX3964CEP
MAX3964C/D
MAX3964C/DW
MAX3964AETP
MAX3964AC/D
MAX3965CEP
MAX3965C/D
MAX3965C/DW
MAX3968CEP
MAX3968C/D
MAX3968C/DW
TEMP RANGE
0 C to +70 C
0
o
C to +70
o
C
0 C to +70 C
-40 C to +85 C
-40
o
C to +85
o
C
0 C to +70 C
0 C to +70 C
0
o
C to +70
o
C
0 C to +70 C
0
o
C to +70
o
C
0 C to +70 C
o
o
o
o
o
o
o
o
o
o
o
o
o
o
PIN-PACKAGE
20 QSOP
Dice*
Wafers*
20 Thin QFN**
Dice*
20 QSOP
Dice*
Wafers*
20 QSOP
Dice*
Wafers*
Applications
125Mbps FDDI Receivers
155Mbps LAN ATM Receivers
Fast Ethernet Receivers
ESCON Receivers
155Mbps FTTx Receivers
Pin Configurations appear at end of data sheet.
Selector Guide appears at end of data sheet.
*Dice
and wafers are designed to operate over a 0°C to +100°C
junction temperature (Tj) range, but are tested and guaranteed
only at T
A
= +25°C.
**Package
Code: T2044-1
Typical Operating Circuit
V
CC
10nF
V
CC
V
CC
PHOTODIODE
C
IN
10nF
155Mbps
TIA
OUT-
OUT+
IN
GND
(MAX3965 ONLY)
C
IN
10nF
R1
≥100k
GNDO
INV
IN-
IN+
FILTER
10nF
V
CC
FILTER
V
CC0
CZP
CZN
RSSI
SQUELCH
LOS+
V
CC
C
AZ
27nF
LOS TERMINATIONS
ARE USED ONLY
FOR THE MAX3964
AND MAX3968
MAX3964A
LOS-
MAX3965
MAX3968
OUT-
OUT+
SUB*
GND
V
TH
50
Ω
50Ω
50Ω
50Ω
R2
V
CC
- 2V
*PIN NOT AVAILABLE ON MAX3964AETP.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
MAX3964A/MAX3965/MAX3968
ABSOLUTE MAXIMUM RATINGS
(SUB, GND, GNDO tied to ground)
V
CC
, V
CCO
.............................................................-0.5V to +7.0V
FILTER, RSSI, IN+, IN-, CZP, CZN, SQUELCH,
LOS+, LOS-, INV, VTH, OUT+, OUT- ......-0.5V to (V
CC
+ 0.5V)
PECL Output Current (OUT+, OUT-, LOS+, LOS-) ............50mA
Differential Voltage Between CZP and CZN..........-1.5V to +1.5V
Differential Voltage Between IN+ and IN- .............-1.5V to +1.5V
Continuous Power Dissipation (T
A
= +70°C)
20-Lead Thin QFN
(derate 16.9mW/°C above +70°C) ..........................1349mW
20-Pin QSOP (derate 6.7mW/°C above +70°C)...........500mW
Operating Temperature Range ...........................-40°C to +85°C
Operating Junction Temperature Range (die) .....-40°C to +150°C
Processing Temperature (die) ........................................+400°C
Storage Temperature Range .......................... -65°C to +160°C
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX3964ACEP/MAX3965CEP/MAX3968CEP
(V
CC
= +3.0V to +5.5V, PECL outputs terminated with 50Ω to (V
CC
- 2V), T
A
= 0°C to +70°C, unless otherwise noted. Typical values
are at V
CC
= +3.3V and T
A
= +25°C.) (Note 1)
PARAMETER
Supply Current
LOS Hysteresis
SQUELCH Input Current
PECL Output Voltage High
PECL Output Voltage Low
PECL LOS Output Voltage High
PECL LOS Output Voltage Low
LOS Assert Accuracy
Minimum LOS Assert Input
Maximum LOS Deassert Input
Input Sensitivity
Input Overload
Output Transition Time
Pulse-Width Distortion
TTL Output High
TTL Output Low
t
r
, t
f
20% to 80% transition time,
MAX3964A/MAX3965
MAX3968
(Note 4)
I
OH
= -200µA
I
OL
= 200µA
2.4
0
1.5
0.92
0.4
1.2
0.8
50
3.1
0.3
2.20
1.2
200
V
CC
0.4
ps
V
V
143
2.0
3.3
SYMBOL
I
CC
CONDITIONS
PECL outputs open
Input = 3.3mV
P-P
to 90mV
P-P
(Note 2)
V
SQUELCH
= V
CC
, T
A
= +25°C
(Note 3)
(Note 3)
(Note 3)
(Note 3)
Input = 7mV
P-P
or 90mV
P-P
-1025
-1810
-1035
-1810
-2.5
3.8
MIN
TYP
22
5
27
MAX
40
8.0
100
-880
-1620
-880
-1620
+2.5
2.7
UNITS
mA
dB
µA
mV
mV
mV
mV
dB
mV
P-P
mV
P-P
mV
P-P
V
P-P
ns
2
_______________________________________________________________________________________
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
ELECTRICAL CHARACTERISTICS—MAX3964AETP
(V
CC
= +3.0V to +5.5V, PECL outputs terminated with 50Ω to (V
CC
- 2V), T
A
= -40°C to +85°C. Typical values measured at V
CC
=
+3.3V and T
A
= +25°C, unless otherwise noted.)
PARAMETER
Supply Current
LOS Hysteresis
SQUELCH Input Current
PECL Output Voltage High
PECL Output Voltage Low
LOS Assert Accuracy
Minimum LOS Assert Input
Maximum LOS Deassert Input
Input Sensitivity
Input Overload
Output Transition Time
Pulse-Width Distortion
t
r
, t
f
20% to 80%
(Note 4)
1.5
1.6
50
2.4
250
143
2
4
(Note 3)
(Note 3)
Input = 7mV
P-P
or 90mV
P-P
, 0°C to +85°C
Input = 7mV
P-P
or 90mV
P-P
, -40°C to 0°C
-1.085
-1.830
-3
-3.6
SYMBOL
I
CC
CONDITIONS
PECL outputs open
Input = 4.0mV
P-P
(Note 2)
3.0
MIN
TYP
22
5
27
MAX
45
8.0
100
-0.880
-1.550
+3
+3.6
2.7
UNITS
mA
dB
µA
V
V
dB
mV
P-P
mV
P-P
mV
P-P
V
P-P
ns
ps
P-P
MAX3964A/MAX3965/MAX3968
Note 1:
Note 2:
Note 3:
Note 4:
Dice are tested and guaranteed at T
A
= +25°C only.
LOS hysteresis = 20log(V
LOS-DEASSERT
/ V
LOS-ASSERT
).
Voltage measurements are relative to supply voltage (V
CC
).
PWD = [(width of wider pulse) - (width of narrower pulse)] / 2, measured with 100Mbps 1-0 pattern.
Typical Operating Characteristics
(MAX3964A EV kit, V
CC
= +3.3V, decibels (dB) calculated as 20 log
∆V,
PECL outputs terminated with 50Ω to (V
CC
- 2V), T
A
= +25°C,
unless otherwise noted.)
PULSE-WIDTH DISTORTION
vs. INPUT AMPLITUDE
MAX3964/65toc02
MAX3964/65toc03
RSSI VOLTAGE vs. INPUT AMPLITUDE
INPUT PATTERN IS 2
23 -
1 PRBS
MAX3964/65toc01
RSSI VOLTAGE vs. TEMPERATURE
2.3
2.2
2.1
INPUT = 100mV
100
90
80
PWD (ps)
INPUT = 10mV
INPUT = 5mV
1.6
70
60
50
40
30
-40
-20
0
20
40
60
80
100
1
3.00
2.50
LOS DEASSERTED
V
RSSI
(V)
2.00
LOS ASSERTED
1.50
V
RSSI
(V)
1
10
100
1k
2.0
1.9
1.8
1.7
1.00
INPUT AMPLITUDE (mV)
1.5
TEMPERATURE (°C)
10
100
1k
10k
INPUT AMPLITUDE (mV
P-P
)
_______________________________________________________________________________________
3
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
MAX3964A/MAX3965/MAX3968
Typical Operating Characteristics (continued)
(MAX3964A EV kit, V
CC
= +3.3V, decibels (dB) calculated as 20 log
∆V,
PECL outputs terminated with 50Ω to (V
CC
- 2V), T
A
= +25°C,
unless otherwise noted.)
DATA OUTPUT EDGE SPEED
(20% to 80%) vs. TEMPERATURE
MAX3964/65toc04
OUTPUT AMPLITUDE vs. INPUT VOLTAGE
(DIFFERENTIAL SIGNAL LEVELS)
MAX3964/65toc05
3.0
1600
MAX3964A/MAX3965
1.8
OUTPUT AMPLITUDE (mV)
2.4
EDGE SPEED (ns)
1400
1200
1.2
MAX3968
0.6
1000
800
0
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
600
0.1
1
10
100
1k
10k
INPUT VOLTAGE (mV)
LOS OPERATION WITH SQUELCH
MAX3964 toc06
MAX3964A/MAX3965
EYE DIAGRAM (INPUT = 3.3mV)
MAX3964 toc07
DATA
INPUT
DATA
OUTPUT
200mV/div
LOS+
10
µ
s/div
1ns/div
4
_______________________________________________________________________________________
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
Pin Description
PIN
QSOP
THIN
QFN
19
NAME
FUNCTION
Squelch Input. The squelch function disables the data outputs by forcing OUT- low and OUT+
high during a loss-of-signal condition. Connect to GND or leave unconnected to disable.
Connect to V
CC
to enable squelching.
Output of Internal Op Amp that Sets Loss-of-Signal Threshold Voltage (Figure 1). Connect a
resistor from V
TH
to INV and from INV to ground (minimum resistance 100kΩ) to program the
desired threshold voltage.
Inverting Input of Internal Op Amp that Sets Loss-of-Signal Threshold Voltage (Figure 1).
Connect a resistor from V
TH
to INV and from INV to ground (minimum resistance 100kΩ) to
program the desired threshold voltage.
Filter Output of Full-Wave Logarithmic Detectors (FWDs). The FWD outputs are summed
together at FILTER to generate the received-signal-strength indicator (RSSI). Connect a
capacitor from FILTER to V
CC
for proper operation.
Received-Signal-Strength Indicator Output. The analog DC voltage at RSSI indicates the input
signal power. The RSSI output is reduced approximately 120mV when LOS+ is asserted.
Inverting Data Input
Noninverting Data Input
Substrate. Connect to ground.
Ground
Auto-Zero Capacitor Input. Connect a capacitor between CZP and CZN to determine the offset-
correction-loop bandwidth.
Auto-Zero Capacitor Input. Connect a capacitor between CZP and CZN to determine the offset-
correction-loop bandwidth.
Output Buffer Supply Voltage. Connect to the same potential as V
CC
, but filter V
CCO
and V
CC
separately.
Noninverting PECL Data Output. Terminate with 50Ω to (V
CC
- 2V).
Inverting PECL Data Output. Terminate with 50Ω to (V
CC
- 2V).
Inverting Loss-of-Signal Output. LOS- is asserted low when input power drops below the LOS
threshold. For the MAX3964A/MAX3968, this pin is PECL compatible and should be terminated
with 50Ω to (V
CC
- 2V). For the MAX3965, this output is TTL compatible and does not require
termination.
Noninverting Loss-of-Signal Output. LOS+ is asserted high when input power drops below the
LOS threshold. For the MAX3964A/MAX3968, this pin is PECL compatible and should be
terminated with 50Ω to (V
CC
- 2V). For the MAX3965, this output is TTL compatible and does not
require termination.
MAX3964A/MAX3968: This pin can be left open or connected to the positive supply.
MAX3965: This pin must be connected to ground.
+3.0V to +5.5V Supply Voltage
Connect the exposed pad to board ground for optional electrical and thermal performance.
MAX3964A/MAX3965/MAX3968
1
SQUELCH
2
20
V
TH
3
1
INV
4
2
FILTER
5
6
7
8
9, 10
11
12
13
14
15
3
4
5
—
6, 7, 8
9
10
11
12
13
RSSI
IN-
IN+
SUB
GND
CZP
CZN
V
CCO
OUT+
OUT-
16
14
LOS-
17
15
LOS+
V
CCO
18
19, 20
—
16
GNDO
17, 18
EP
V
CC
Exposed
Pad
_______________________________________________________________________________________
5
单片机
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
