Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . . . . 5.5V to 10V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TEST CONDITIONS
SETUP AND
PROCEDURE
(FIGURE)
1
FREQUENCY
f (MHz)
-
DC SUPPLY
VOLTAGE
V
CC
(V)
6
TEMP
(
o
C)
-55
25
125
-
7.5
-55
25
125
-
10
-55
25
125
Voltage Gain (Note 3)
A
3
1
6
-55
25
125
3
1
7.5
-55
25
125
3
1
10
-55
25
125
3
4.5
10.7
Input Impedance Components
Parallel Input Resistance
Parallel Input Capacitance
Output Impedance Components
Parallel Output Resistance
Parallel Output Capacitance
Noise Figure
Input Limiting Voltage (Knee)
NOTES:
2. The total current drain may be determined by dividing P
T
by V
CC
.
3. Recommended minimum DC supply voltage (V
CC
) is 5.5V. Nominal load current flowing into terminal 5 is 1.5mA at 7.5V.
R
OUT
C
OUT
NF
V
I(LIM
)
8
8
10
3
4.5
4.5
4.5
4.5
7.5
7.5
7.5
7.5
25
25
25
25
-
-
-
-
31.5
4.2
8.7
300
-
-
-
400
kΩ
pF
dB
µV
R
IN
C
IN
6
6
4.5
4.5
7.5
7.5
25
25
-
-
3
7
-
-
kΩ
pF
7.5
7.5
25
25
PARAMETER
Total Device Dissipation (Note 2)
SYMBOL
P
T
MIN
66
66
65
97
97
95
150
150
150
50
60
50
55
65
55
55
65
55
60
55
TYP
80
90
70
130
120
100
210
190
160
55
66
61
59
70
65
61
71
66
67
61
MAX
135
121
121
190
167
167
275
255
255
-
-
-
-
-
-
-
-
-
-
-
UNITS
mW
mW
mW
mW
mW
mW
mW
mW
mW
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
8-19
CA3012
Typical Performance Curves and Test Setups
250
TOTAL DEVICE DISSIPATION (mW)
200
V
CC
= 10
150
7.5
100
6
50
+V
CC
10
1
50Ω
2
8
+
I
6
7
4
CA3012
5
0.1µF
-
0
-75
-50
-25
0
25
50
75
100
125
150
TEMPERATURE (
o
C)
FIGURE 1. DISSIPATION TEST SETUP
FIGURE 2. DISSIPATION vs TEMPERATURE
+V
CC
0.1µF
R
OUT
1kΩ
Procedures
A. Voltage Gain
1.Set input frequency at desired value, V
I
= 100µV
RMS
2. Record V
O
3. Calculate Voltage Gain A from A = 20 log
10
V
O
/V
I
4. Repeat steps 1, 2 and 3 for each frequency and/or for
temperature desired
B. Input Limiting Voltage (Knee)
0.1µF
1
SIGNAL
SOURCE
R
G
= 50Ω
50Ω
2
0.1µF
0.1µF
10
5
V
O
RF
VOLTMETER
V
I
CA3012
3
8
4
0.1µF
1.Repeat steps A1 and A2, using V
I
= 100mV
2. Decrease V
I
to the level at which V
O
is 3dB below its
value for V
I
= 100mV
3. Record V
I
as Input Limiting Voltage (Knee)
FIGURE 3. VOLTAGE GAIN TEST SETUP
80
V
CC
= 7.5, f = 1MHz, R
S
= 50Ω, R
L
= 1kΩ
75
VOLTAGE GAIN (dB)
VOLTAGE GAIN
70
65
60
55
50
-75
INPUT LIMITING
600
INPUT LIMITING VOLTAGE (µV)
500
400
300
200
100
0
150
72
70
T
A
= 25
o
C, V
CC
= 7.5, R
S
= 50Ω, R
L
= 1kΩ
VOLTAGE GAIN
700
600
500
400
300
INPUT LIMITING VOLTAGE (µV)
VOLTAGE GAIN (dB)
68
66
64
INPUT LIMITING VOLTAGE
62
60
0.1
200
100
1
FREQUENCY (MHz)
10
-50
-25
0
25
50
75
o
C)
TEMPERATURE (
100
125
FIGURE 4. VOLTAGE GAIN AND INPUT LIMITING VOLTAGE
vs TEMPERATURE
FIGURE 5. VOLTAGE GAIN AND INPUT LIMITING VOLTAGE vs
FREQUENCY
8-20
CA3012
Typical Performance Curves and Test Setups
PARALLEL INPUT CAPACITANCE (pF)
(Continued)
10
+V
CC
8
4
10
1
HI
R-X METER
LO
2
0.1µF
0.1µF
3
8
V
I
≤
100mV
CA3012
5
C
IN
6
R
IN
3
4
0.1µF
4
0
5
10
FREQUENCY (MHz)
2
15
FIGURE 6. INPUT IMPEDANCE TEST SETUP
FIGURE 7. INPUT IMPEDANCE vs FREQUENCY
6
PARALLEL OUTPUT CAPACITANCE (pF)
PARALLEL OUTPUT RESISTANCE (kΩ)
10
T
A
= 25
o
C, V
CC
= 7.5
5
50
1
CA3012
2
0.1µF
0.1µF
3
4
0.1
µF
8
5
HI
10
LO
R-X METER
C
OUT
4
40
0.1µF
+V
CC
R
OUT
3
0
5
10
FREQUENCY (MHz)
30
15
FIGURE 8. OUTPUT IMPEDANCE TEST SETUP
FIGURE 9. OUTPUT IMPEDANCE vs FREQUENCY
+V
CC
0.1µF
10
R
S
= 200Ω
1
L
1
C
1
2
4.5MHz
NOISE SOURCE
0.1µF
0.1µF
3
4
0.1
µF
8
CA3012
RF
VOLTMETER
5
NOISE FIGURE (dB)
L
2
C
2
9.5
T
A
= 25
o
C, f = 4.5MHz, R
S
= 200Ω
9.0
8.5
L
1
= 82µH, CENTER TAPPED
L
2
= 2.36µH
C
1
, C
2
= ARCO TYPE 423 PADDER, OR EQUIVALENT
8.0
6
7
8
DC SUPPLY VOLTS (V
CC
)
9
FIGURE 10.
FIGURE 11. NOISE FIGURE vs DC SUPPLY VOLTAGE
8-21
PARALLEL INPUT RESISTANCE (kΩ)
T
A
= 25
o
C, V
CC
= 7.5
CA3012
Typical Application
+V
CC
10
10.88MHz -108MHz
TUNER
10.7MHz
SELECTIVITY
FM
DETECTOR
1
CA3012
2
3
4
8
5
AF
AMPLIFIER
SPEAKER
FIGURE 12. BLOCK DIAGRAM OF TYPICAL FM RECEIVER USING THE CA3012 INTEGRATED CIRCUIT WIDEBAND AMPLIFIER
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
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