FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12537-1E
8-bit Proprietary Microcontroller
CMOS
F
2
MC-8L MB89670R/670AR Series
MB89673R/673AR/675R/675AR
MB89677AR/P677A/PV670A
s
OUTLINE
The MB89670R/670AR series has been developed as a line of proprietary 8-bit, single-chip microcontrollers.
In addition to the F
2
MC*-8L family CPU core which can operate at low voltage but at high speed, the
microcontrollers contain pheripheral functions such as timers, a serial interface, a 10-bit A/D converter, a UART,
an 8/16-bit up/down counter/timer, and an external interrupt.
The MB89670R/670AR series is applicable to a wide range of applications from consumer appliances to
industrial equipment, including portable devices.
*: F
2
MC stands for FUJITSU Flexible Microcontroller.
s
FEATURES
• F
2
MC-8L family CPU core
Multiplication and division instructions
16-bit arithmetic operations
Test and branch instructions
Bit manipulation instructions, etc.
Instruction set optimized for controllers
• High-speed processing at low voltage
• Minimum execution time: 0.4
µs@3.5
V, 0.8
µs@2.7
V, 2.0
µs@2.2
V
• I/O ports: max. 69 channels
(Continued)
s
PACKAGE
80-pin Plastic QFP
80-pin Plastic LQFP
80-pin Ceramic MQFP
(FPT-80P-M06)
(FPT-80P-M06)
(FPT-80P-M11)
(FPT-80P-M11)
(MQP-80C-P01)
(MQP-80C-P01)
MB89670R/670AR Series
(Continued)
• Timers: 9 channels (MB89675AR/677AR/P677A/PV670A: 12 channels)
8-bit PWM timer: 3 channels (MB89675AR/677AR/P677A/PV670A: 6 channels) (also usable as a reload
timer or 8-bit PWM timer)
16-bit timer/counter
21-bit timebase timer
8/16-bit timer (8 bits
×
2 channels or 16 bits)
8/16-bit up/down counter/timer (8 bits
×
2 channels or 16 bits)
• 2-channel serial interfaces
8-bit synchronized serial: 1 channel (Switchable transfer direction allows communication with various
equipment.)
UART: 1 channel (internal full-duplex double buffer)
• External interrupts: 8 channels
Eight channels are independent and capable of wake-up from low-power consumption modes (with an edge
detection function).
• Buzzer output
• 10-bit A/D converter
Input: 8 channels
• Low-power consumption modes
Stop mode (Oscillation stops to minimize the current consumption.)
Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
• Bus interface function
Including hold and ready functions
2
MB89670R/670AR Series
s
PRODUCT LINEUP
Part number
MB89673R
*1
MB89673AR MB89675R
*1
MB89675AR MB89677AR MB89P677A
MB89PV670A
Item
Classification
Mass-produced products
(mask ROM products)
8 K
×
8 bits
(internal mask ROM)
384
×
8 bits
16 K
×
8 bits
(internal mask ROM)
512
×
8 bits
One-time
PROM
product (for
development)
Piggyback/
evaluation
product (for
development)
ROM size
32 K
×
8 bits
(internal mask ROM)
1 K
×
8 bits
48 K
×
8 bits
(external
ROM)
RAM size
CPU
functions
The number of instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
Output ports (N-channel open-drain):
Output ports (CMOS):
I/O ports (N-channel open-drain):
I/O ports (CMOS):
Input ports:
Total:
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.4
µs@10
MHz to 6.4
µs@10
MHz
3.6
µs@10
MHz to 57.6
µs@10
MHz
14 (12 also serve as peripherals.)
8 (All also serve as peripherals.)
7 (All also serve as peripherals.)
32 (All also serve as peripherals.)
8 (All also serve as peripherals.)
69
Set with
EPROM
programmer
Setting not
possible
Ports
Option
Specify when ordering masking
Timebase
timer
8/16-bit
up/down
counter/timer
16-bit
timer/counter
8/16-bit
timer/counter
8-bit PWM
timer 1, 2
21 bits (0.81 ms, 3.27 ms, 26.21 ms, 419 ms@10 MHz)
8 bits
×
2 channels or 16 bits
×
1 channel
Timer operation
Up/down counter operation
Phase difference counting (double mode, quadruple mode)
16-bit timer operation
16-bit event counter operation (edge selectable)
8 bits
×
2 channels or 16 bits
×
1 channel
Reload timer operation (toggled output capable)
Event counter operation
8 bits
×
2 channels reload timer operation (toggled output capable)
8 bits
×
2 channels PWM operation (four frequencies fixed)
8 bits
×
1 channel PPG operation (variable frequency)
Capable of output switching between 2 channels in any mode
8-bit reload timer operation (toggled output capable)
8-bit PWM operation (four frequencies fixed)
Capable of output switching between 2 channels in any mode
8 bits
LSB first/MSB first selectable
One clock selectable from four transfer clocks
(one external shift clock, three internal shift clocks)
8-bit PWM
timer 3, 4, 5, 6
8-bit serial I/O
(Continued)
3
MB89670R/670AR Series
(Continued)
Part number
MB89673R
*1
MB89673AR MB89675R
*1
MB89675AR MB89677AR MB89P677A
MB89PV670A
Item
UART
Variable data length (7 or 8 bits)
On-chip baud rate generator
Error detection function
On-chip full-duplex double buffer
NRZ transfer format
CLK synchrnous/asynchronous data transfer capable
10 bits
×
8 channels
8 channels (Rising edge/falling edge)
2.2 V to 6.0 V
—
2.7 V to 6.0 V
MBM27C512
-20TV
10-bit A/D
converter
External
interrupt
Power supply
voltage
*2
EPROM for
use
*1: 8-bit PWM timer 4, 5, and 6 are not provided for the MB89673R/MB89675R.
*2: The minimum operating voltage varies with the operating frequency, the function, and the connected ICE.
s
PACKAGE AND CORRESPONDING PRODUCTS
Package
FPT-80P-M06
FPT-80P-M11
MQP-80C-P01
: Available
×
×
×
MB89673R
MB89675R
MB89673AR
MB89675AR
MB89677AR
MB89P677A
MB89PV670A
×
×*
×
: Not available
* : Lead pitch converter sockets (manufacturer: Sun Hayato Co., Ltd.) are available
80QF-80QF2-8L-UP
+ (MQP-80C-P01 or FPT-80P-M06)
→
for conversion to FPT-80P-M11
80QF-80QF2-8L-DWN
Inquiry: Sun Hayato Co., Ltd.: TEL: (81)-3-3986-0403
FAX: (81)-3-5396-9106
Note: For more information about each package, see section “s Package Dimensions.”
4
MB89670R/670AR Series
s
DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, make sure of its differences from the product that will actually
be used. Take particular care on the following points:
• On the MB89P677A, the program area starts from address 8007
H
, while on the MB89677AR and MB89PV670A
starts from 8000
H
.
(On the MB89P677A, the option setting data can be read by reading the addresses “8000
H
” to “8006
H
”, while
on the MB89677AR and MB89PV670A, addresses 8000
H
to 8006
H
could also be used as a program ROM.
However, do not use these addresses in order to maintain compatibility of the MB89P677A.)
• The stack area, etc., is set at the upper limit of the RAM.
• The external area is used.
2. Current Consumption
• In the case of the MB89PV670A, add the current consumed by the EPROM which is connected to the top socket.
• When operated at low speed, the product with an OTPROM (one-time PROM) or an EPROM will consume
more current than the product with a mask ROM.
However, the current consumption in sleep/stop modes is the same. (For more information, see sections
“s Electrical Characteristics” and “s Example Characteristics.”)
3. Mask Options
Functions that can be selected as options and how to designate these options vary by the product.
Before using options check section “s Mask Options.”
Take particular care on the following point:
• Options are fixed on the MB89PV670A.
4. Differences between the MB89670/670A and MB89670R/670AR Series
• Memory access area
Memory access area of both the MB89677A and MB89677AR is the same.
The access are of the MB89673 is different from that of the MB89673R and MB89673AR respectively in the
external bus mode. See below.
Address
0000
H
to 007F
H
0080
H
to 01FF
H
0200
H
to 027F
H
0280
H
to BFFF
H
C000
H
to DFFF
H
E000
H
to FFFF
H
I/O area
Memory area
MB89673
RAM area
External area
ROM area
MB89673R/673AR
I/O area
RAM area
Access prohibited
External area
Access prohibited
ROM area
5
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