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MB89PV480-101C-SH

产品描述8-bit Proprietary Microcontroller
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小467KB,共55页
制造商FUJITSU(富士通)
官网地址http://edevice.fujitsu.com/fmd/en/index.html
下载文档 详细参数 全文预览

MB89PV480-101C-SH概述

8-bit Proprietary Microcontroller

MB89PV480-101C-SH规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称FUJITSU(富士通)
包装说明SDIP, SDIP64,.75
Reach Compliance Codecompli
Is SamacsysN
具有ADCYES
其他特性OPERATES AT 2.7 V MINIMUM SUPPLY @ 7 MHZ
地址总线宽度
位大小8
CPU系列F2MC-8L
最大时钟频率12.5 MHz
DAC 通道NO
DMA 通道NO
外部数据总线宽度
JESD-30 代码R-CDIP-T64
长度56.9 mm
I/O 线路数量42
端子数量64
最高工作温度85 °C
最低工作温度-40 °C
PWM 通道YES
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码SDIP
封装等效代码SDIP64,.75
封装形状RECTANGULAR
封装形式IN-LINE, SHRINK PITCH
峰值回流温度(摄氏度)NOT SPECIFIED
电源3/5 V
认证状态Not Qualified
RAM(字节)1024
ROM(单词)32768
ROM可编程性EPROM
座面最大高度10.16 mm
速度12.5 MHz
最大压摆率8 mA
最大供电电压5.5 V
最小供电电压3.5 V
标称供电电压5 V
表面贴装NO
技术CMOS
温度等级INDUSTRIAL
端子形式THROUGH-HOLE
端子节距1.778 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度19.05 mm
uPs/uCs/外围集成电路类型MICROCONTROLLER
Base Number Matches1

MB89PV480-101C-SH文档预览

FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12559-1E
8-bit Proprietary Microcontroller
CMOS
F
2
MC-8L MB89480/MB89480L Series
MB89485/485L/P485/P485L/PV480
s
DESCRIPTION
The MB89480 series has been developed as a general-purpose version of the F
2
MC*-8L family consisting of
proprietary 8-bit single-chip microcontrollers.
In addition to a compact instruction set, the microcontroller contains a variety of peripheral functions such as 21-
bit timebase timer, watch prescaler, PWC timer, PWM timer, 8/16-bit timer/counter, 6-bit PPG, LCD controller/
driver, external interrupt 1 (edge), external interrupt 2 (level), 10-bit A/D converter, UART/SIO, buzzer, watchdog
timer reset.
The MB89480 series is designed suitable for LCD remote controller as well as in a wide range of applications for
consumer product.
*: F
2
MC stands for FUJITSU Flexible Microcontroller.
s
FEATURES
• Package used
LQFP package and SH-DIP package for MB89P485/P485L, MB89485/485L
MDIP package and MQFP package for MB89PV480
• High speed operating capability at low voltage
• Minimum execution time: 0.32
µs
at 12.5 MHz
(Continued)
s
PACKAGES
64-pin Plastic SH-DIP
64-pin Plastic LQFP
64-pin Ceramic MDIP
64-pin Ceramic MQFP
(DIP-64P-M01)
(FPT-64P-M09)
(MDP-64C-P02)
(MQP-64C-P01)
MB89480/480L Series
(Continued)
• F
2
MC-8L family CPU core
Instruction set optimized for controllers
Multiplication and division instructions
16-bit arithmetic operations
Test and branch instructions
Bit manipulation instructions, etc.
• Six timers
PWC timer (also usable as an interval timer)
PWM timer
8/16-bit timer/counter x 2
21-bit timebase timer
Watch prescaler
• Programmable pulse generator
6-bit PPG with program-selectable pulse width and period
• External interrupt
Edge detection (selectable edge) : 4 channels
Low level interrupt (wake-up function) : 8 channels
• A/D converter (4 channels)
10-bit successive approximation type
• UART/SIO
Synchronous/asynchronous data transfer capability
• LCD controller/driver
Max 31 segments output x 4 commons
Booster for LCD driving (selected by mask option)
• Buzzer
7 frequencies are selectable by software
• Low-power consumption mode
Stop mode (oscillation stops so as to minimize the current consumption.)
Sleep mode (CPU stops so as to reduce the current consumption to approx. 1/3 of normal.)
Watch mode (everything except the watch prescaler stops so as to reduce the power comsumption to an
extremely low level.)
Sub-clock mode
• Watchdog timer reset
• I/O ports: Max 42 channels
2
MB89480/480L Series
s
PRODUCT LINEUP
Part number
Parameter
Classification
ROM size
RAM size
MB89485L
MB89485
MB89P485L
MB89P485
MB89PV480
Piggy-back
32K x 8-bit
(external ROM)*
1
1K
×
8-bit
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8, 16 bits
: 0.32
µs
at 12.5 MHz
: 2.88
µs
at 12.5 MHz
: 11 pins
: 28 pins
: 2 pins
: 1 pin
: 42 pins
Mass production products
(mask ROM product)
16K x 8-bit (internal ROM)
OTP
16K x 8-bit (internal PROM
with read protection) *
2
512 x 8-bit
Number of instructions
Instruction bit length
Instruction length
Data bit length
Minimum execution time
Minimum interrupt processing time
I/O ports (CMOS)
N-channel open drain I/O ports
Output ports (N-channel open drain)
Input port
Total
CPU functions
Ports
21-bit timebase
timer
Watchdog timer
Interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 MHz.
Reset period (167.8 ms to 335.5 ms) at 12.5 MHz.
1 channel.
8-bit one-shot timer operation (supports underflow output, operating clock period: 1, 4, 32 t
inst
,
external).
8-bit reload timer operation (supports square wave output, operating clock period: 1, 4, 32 t
inst
,
external).
8-bit pulse width measurement operation (supports continuous measurement, H width,
L width, rising edge to rising edge, falling edge to falling edge measurement and both edge
measurement).
8-bit reload timer operation (supports square wave output, operating clock period: 1, 4, 32 t
inst
,
external).
8-bit resolution PWM operation.
Can generate square pulse with programmable period.
Pulse width count
timer
PWM timer
6- bit programmable
pulse generator
Can be operated either as a 2-channel 8-bit timer/counter (timer 11 and timer 12, each with its
8/16-bit timer/counter own independent operating clock cycle), or as one 16-bit timer/counter.
11, 12
In timer 11 or 16-bit timer/counter operation, event counter operation (external clock-triggered)
and square wave output capability.
Can be operated either as a 2-channel 8-bit timer/counter (timer 21 and timer 22, each with its
8/16-bit timer/counter own independent operating clock cycle), or as one 16-bit timer/counter.
21, 22
In timer 21 or 16-bit timer/counter operation, event counter operation (external clock-triggered)
and square wave output capability.
External interrupt
4 independent channels (selectable edge, interrupt vector, request flag).
8 channels (low level interrupt).
(Continued)
3
MB89480/480L Series
(Continued)
Part number
Parameter
A/D converter
MB89485L
MB89485
MB89P485L
MB89P485
MB89PV480
10-bit resolution
×
4 channels.
A/D conversion function (conversion time: 60 t
inst
).
Supports repeated activation by internal clock.
Common output
Segment output
: 4 (Max)
: 31 (Max) (selected resistor ladder)
: 26 (Max) (selected booster)
:4
: 31
×
4 bits
: selected by mask option
LCD controller/driver
Bias power supply pins
LCD display RAM size
Dividing resistor/booster
UART/SIO
Buzzer output
Standby mode
Process
Operating voltage
Synchronous/asynchronous data transfer capability.
(Max baud rate: 97.656 Kbps at 12.5 MHz).
(7 and 8 bits with parity bit; 8 and 9 bits without parity bit).
7 frequencies are selectable by software.
Sleep mode, stop mode, watch mode, sub-clock mode.
CMOS
2.2 V to 3.6 V 2.2 V to 5.5 V 2.7 V to 3.6 V 3.5 V to 5.5 V
2.7 V to 5.5 V
*1 : Use MBM27C256A as the external ROM.
*2 : Read protection feature is selected by part number, detail please refer to MASK OPTIONS.
Note : 1 t
inst
= one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock.
s
PACKAGE AND CORRESPONDING PRODUCTS
Part number
Package
DIP-64P-M01
FPT-64P-M09
MDP-64C-P02
MQP-64C-P01
O : Availabe
X : Not available
MB89485/485L
O
O
X
X
MB89P485/P485L
O
O
X
X
MB89PV480
X
X
O
O
4
MB89480/480L Series
s
DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, verify its differences from the product that will actually be used.
Take particular care on the following point:
• The stack area is set at the upper limit of the RAM.
2. Current Consumption
• For the MB89PV480, the current consumed by the EPROM mounted in the piggy-back socket is needed to
be included.
• When operating at low speed, the current consumed by the one-time PROM product is greater than that for
the mask ROM product. However, the current consumption is roughly the same in sleep and stop mode.
• For more information, see “s ELECTRICAL CHARACTERISTICS”.
3. Oscillation Stabilization Time after Power-on Reset
For MB89PV480, MB89P485L and MB89485L, there is no power-on stabilization time after power-on reset.
For MB89P485, there is power-on stabilization time after power-on reset.
For MB89485, the power-on stabilization time can be selected.
For more information, please refer to “s MASK OPTION”.
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