FUJITSU SEMICONDUCTOR
DATA SHEET
16-bit Proprietary Microcontroller
CMOS
R
MB90800 Series
MB90803/F804/V800
s
DESCRIPTION
The MB90800 series is a general-purpose 16-bit microcontroller that has been developed for high-speed real-
time processing required for industrial and office automation equipment and process control, etc. The LCD
controller of 48 segment four common is built into.
Instruction set has taken over the same AT architecture as in the F
2
MC*-8L and F
2
MC 16L, and is further enhanced
to support high level languages, extend addressing mode, enhanced divide/multiply instructions with sign and
enrichment of bit processing. In addition, long word processing is now available by introducing a 32-bit accumulator.
* : F
2
MC, an abbreviation for FUJITSU Flexible Microcontroller, is a registered trademark of FUJITSU Ltd.
s
FEATURES
•
Clock
• Built-in PLL clock frequency multiplication circuit
• Operating clock (PLL clock) can be selected from divided-by-2 of oscillation or 1 to 4 times the oscillation (at
oscillation of 6.25 MHz, 6.25 MHz to 25 MHz).
• Minimum instruction execution time of 40.0 ns (at oscillation of 6.25 MHz, four times the PLL clock, operation
at Vcc
=
3.3 V)
•
The maximum memory space:16 MB
• 24-bit internal addressing
• Bank addressing
(Continued)
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PACKAGE
100-pin plastic QFP
(FPT-100P-M06)
MB90800 Series
(Continued)
•
Optimized instruction set for controller applications
• Wide choice of data types (bit, byte, word, and long word)
• Wide choice of addressing modes (23 types)
• High code efficiency
• Enhanced high-precision computing with 32-bit accumulator
• Enhanced Multiply/Divide instructions with sign and the RETI instruction
•
Instruction system compatible with high-level language (C language) and multitask
• Employing system stack pointer
• Instruction set has symmetry and barrel shift instructions
•
Program Patch Function (2 address pointer)
•
4-byte instruction queue
•
Interrupt function
• The priority level can be set to programmable.
• Interrupt function with 32 factors
•
Data transfer function
• Expanded intelligent I/O service function (EI 2 OS): Maximum of 16 channels]
•
Low Power Consumption Mode
• Sleep mode (a mode that helts CPU operating clock)
• Time-base timer mode (a mode that operates oscillation clock and time-base timer)
• Watch timer mode (mode in which only the subclock and watch timers operate)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CPU blocking operation mode (operating CPU at each set cycle)
•
Package
• LQFP-120P (FPT-100P-M06:0.65 mm pin pitch)
•
Process : CMOS technology
2
MB90800 Series
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BUILT-IN PERIPHERAL FUNCTION (RESOURCE)
•
I/O port : 68 or less (sub-clocking 70 unused)
•
Time-base timer : 1channel
•
Watchdog timer : 1 channel
•
Watch timer : 1channel
•
LCD Controller
• 48SEG 4COM
•
8/10-bit A/D converter : 12 channels
• 8-bit resolution or 10-bit resolution can be set.
•
16-bit reload timer : 3 channels
•
Multi-functional timer
• 16-bit free run timer : 1 channel
• 16-bit Output Compare : 2 channels
An interrupt request can be output when the count value of the 16-bit free-run timer and the setting value in
the compare register match.
• Input capture : 2 channels
Upon detecting a valid edge of the signal input from the external input pin, the count value of the 16-bit free-
run timer is loaded into the input capture data register and an interrupt request can be output.
• 16-bit PPG timer : 2 channels
• 16-bit reload timer : 3 channels
•
UART : 2 channels
•
Extended I/O serial interface : 2 channels
•
DTP/External interrupt circuit : 4 channels
• Activate the extended intelligent I/O service by external interrupt input
• Interrupt output by external interrupt input
•
Timer clock output circuit
•
Delay interrupt output module
• Output an interrupt request for task switching
•
I
2
C Interface : 1 channel
3
MB90800 Series
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PRODUCT LINEUP
1. MB90800 Series
MB90F804-101/201
MB90803/S
FLASH MEMORY
Mask ROM
Type
For evaluation
built-in type
built-in type
On-chip PLL clock multiplication method(
×
1,
×
2,
×
3,
×
4, 1/2 when PLL stops)
System clock
Minimum instruction execution time of 40.0 ns
(at oscillation of 6.25 MHz, four times the PLL clock)
ROM capacity
No
256 Kbytes
128 Kbytes
RAM capacity
28 Kbytes
16 Kbytes
4 Kbytes
Number of basic instructions : 351
Minimum instruction execution time : 40.0 ns/6.25 MHz oscillator
(When four times is used : machine clock
CPU functions
25 MHz, Power supply voltage : 3.3 V ± 0.3 V)
Addressing type : 23 types
Program Patch Function : 2 address pointers
The maximum memory space : 16MB
I/O port (CMOS) 68 ports (shared with resources), (70 ports when the subclock is
Ports
not used)
Segment driver that can drive the LCD panel (liquid crystal display) directly, and
LCD controller/driver
common driver 48 SEG
×
4 COM
16-bit free-run
1 channel
timer
Overflow interrupt
16-bit
input/
Output compare
2 channels
output
(OCU)
Pin input factor: matching of the compare register
timer
Input capture
2 channels
(ICU)
Rewriting a register value upon a pin input (rising edge, falling edge, or both edges)
16-bit reload timer operation (toggle output, single shot output selectable)
16-Bit Reload Timer
The event count function is optional. The event count function is optional.
Three channels are built in.
Output pin
×
2 ports
16-bit PPG timer
Operating clock frequency : fcp, fcp/22, fcp/24, fcp/26
Two channels are built in.
Clock with a frequency of external input clock divided by 16/32/64/128 can be
Timer clock output circuit
output externally.
I
2
C bus
I
2
C Interface. 1 channel is built-in.
12 channels (input multiplex)
8/10-bit A/D converter
The 8-bit resolution or 10-bit resolution can be set.
Conversion time : 5.9
µs
(When machine clock 16.8 MHz works).
Full-duplex double buffer
UART
Asynchronous/synchronous transmit (with start/stop bits) are supported.
Two channels are built in.
Extended I/O serial interface
Two channels are built in.
Four channel independence (A/D input and using combinedly)
Interrupt delay interrupt
Interrupt causes : “L”→“H” edge/“H”→“L” edge/“L” level/“H” level selectable
8 channels (The 8 channels include with the shared A/D input)
DTP/External interrupt
Interrupt causes：“L”→“H” edge/“H”→“L” edge/“L” level/“H” level selectable
Low Power Consumption Mode Sleep mode/Timebase timer mode/Watch mode/Stop mode/CPU intermittent mode
Process
CMOS
Operating voltage
2.7 V to 3.6 V
4
Part number
MB90V800
MB90800 Series
s
PIN ASSIGNMENT
(TOP VIEW)
P23/SEG31
P22/SEG30
P21/SEG29
P20/SEG28
P17/SEG27
P16/SEG26
P15/SEG25
X0
X1
VSS
VCC
P14/SEG24
P13/SEG23
P12/SEG22
P11/SEG21
P10/SEG20
P07/SEG19
P06/SEG18
P05/SEG17
P04/SEG16
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
P24/SEG32
P25/SEG33
P26/SEG34
P27/SEG35
P30/SEG36/SO3
P31/SEG37/SC3
P32/SEG38/SI3
P33/SEG39/TMCK
P34/SEG40/IC0
P35/SEG41/IC1
P36/SEG42/OCU0
P37SEG43/OCU1
X0A/P90
X1A/P91
VCC
VSS
P40/LED0
P41/LED1
P42/LED2
P43/LED3
P44/LED4
P45/LED5/TOT0
P46/LED6/TOT1
P47/LED7/TOT2
P50/SEG44/TIN0
P51/SEG45/TIN1
P52/SEG46/TIN2/PPG0
P53/SEG47/PPG1
P54/SI0
P55/SO0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
P03/SEG15
P02/SEG14
P01/SEG13
P00/SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
VSS
VCC
SEG1
SEG0
P84/COM3
P83/COM2
COM1
COM0
V3
V2/P82
V1/P81
V0/P80
RST
MD0
MD1
MD2
P56/SO0
AVCC
P57/SI1
P76
AVSS
P60/AN0
P61/AN1
P62/AN2
P63/AN3
P64/AN4
P65/AN5/INT0
P66/AN6/INT1
P67/AN7/INT2
VSS
P70/AN8/INT3
P71/AN9/SC1
P72/AN10/SO1
P73/AN11/SI2
P74/SDA/SC2
P75/SCL/SO2
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
(FPT-100P-M06)
5
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