IDT74FCT2543AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
OCTAL LATCHED
TRANSCEIVER
FEATURES:
•
•
•
•
•
•
•
•
IDT74FCT2543AT/CT
A and C grades
Low input and output leakage
≤
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
Resistor outputs (-15mA I
OH
, 12mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Reduced system switching noise
Available in SOIC and QSOP packages
The FCT2543T is a non-inverting octal transceiver built using an
advanced dual metal CMOS technology. This device contains two sets of
eight D-type latches with separate input and output controls for each set. For
data flow from A to B, for example, the A-to-B Enable (CEAB) input must be
low in order to enter data from A
0
–A
7
or to take data from B
0
–B
7
, as indicated
in the Function Table. With
CEAB
low, a low signal on the A-to-B Latch
Enable (LEAB) input makes the A-to-B latches transparent; a subsequent
low-to-high transition of the
LEAB
signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs. With
CEAB
and
OEAB
both low, the 3-state B output buffers are active and reflect the data
present at the output of the A latches. Control of data from B to A is similar,
but uses the
CEBA, LEBA
and
OEBA
inputs.
The FCT2543T has balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot and controlled output
fall times-reducing the need for external series terminating resistors.
FCT2543T parts are plug-in replacements for FCT543T parts.
DESCRIPTION:
FUNCTIONAL BLOCK DIAGRAM
DETAIL A
D
LE
A
0
Q
D
LE
Q
B
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
DETAIL A x 7
B
1
B
2
B
3
B
4
B
5
B
6
B
7
O EBA
O EAB
CEBA
LEBA
CEAB
LEAB
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
JUNE 2002
DSC-5490/2
© 2002 Integrated Device Technology, Inc.
IDT74FCT2543AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
LEBA
OEBA
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
CEAB
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SOIC/ QSOP
TOP VIEW
V
CC
CEBA
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
LEAB
OEAB
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
OEAB
OEBA
CEAB
CEBA
LEAB
LEBA
A
0
–A
7
B
0
–B
7
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or B-to-A 3-State Outputs
B-to-A Data Inputs or A-to-B 3-State Outputs
FUNCTION TABLE
(1, 2)
For A-to-B (Symmetric with B-to-A)
Inputs
LEAB
X
H
X
L
H
Latch
Status
A-to-B
Storing
Storing
X
Transparent
Storing
Output
Buffers
B
0
–B
7
High Z
X
High Z
Current A Inputs
Previous* A Inputs
CEAB
H
X
X
L
L
OEAB
X
X
H
L
L
NOTES:
1. * Before
LEAB
LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
2. A-to-B data flow shown; B-to-A flow control is the same, except using
CEBA, LEBA
and
OEBA.
2
IDT74FCT2543AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
High Impedance Output Current
(3-State output pins)
(4)
Input HIGH Current
(4)
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min, I
IN
= -18mA
—
V
CC
= Max., V
IN
= GND or V
CC
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
Min.
2
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
200
0.01
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
µA
V
mV
mA
Unit
V
V
µA
µA
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
I
ODL
I
ODH
V
OH
V
OL
Parameter
Output LOW Current
Output HIGH Current
Output HIGH Voltage
Output LOW Voltage
Test Conditions
(1)
V
CC
= 5V, V
IN
= V
IH
or V
IL
, V
OUT
= 1.5V
(3)
V
CC
= 5V, V
IN
= V
IH
or V
IL
, V
OUT
= 1.5V
(3)
V
CC
= Min
I
OH
= –15mA
V
IN
= V
IH
or V
IL
V
CC
= Min
I
OL
= 12mA
V
IN
= V
IH
or V
IL
Min.
16
–16
2.4
—
Typ.
(2)
48
–48
3.3
0.3
Max.
—
—
—
0.5
Unit
mA
mA
V
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A
= –55°C.
3
IDT74FCT2543AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
CEAB
and
OEAB
= GND
CEBA
= V
CC
One Input Toggling
50% Duty Cycle
V
CC
= Max., Outputs Open
f
CP
= 10MHz (LEAB)
50% Duty Cycle
CEAB
and
OEAB
= GND
CEBA
= V
CC
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
V
CC
= Max., Outputs Open
f
CP
= 10MHz (LEAB)
50% Duty Cycle
CEAB
and
OEAB
= GND
CEBA
= V
CC
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
Test Conditions
(1)
Min.
—
—
Typ.
(2)
0.5
0.06
Max.
2
0.12
Unit
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
—
0.6
2.2
mA
V
IN
= 3.4V
V
IN
= GND
—
1.1
4.2
V
IN
= V
CC
V
IN
= GND
—
1.5
4
(5)
V
IN
= 3.4V
V
IN
= GND
—
3.8
13
(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input; (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
∆I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2+ f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Output Frequency
N
i
= Number of Outputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
4
IDT74FCT2543AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
H
Parameter
Propagation Delay
Transparent Mode
Ax to Bx or Bx to Ax
Propagation Delay
LEBA
to Ax,
LEAB
to Bx
Output Enable Time
OEBA
or
OEAB
to Ax or Bx
CEBA
or
CEAB
to Ax or Bx
Output Disable Time
OEBA
or
OEAB
to Ax or Bx
CEBA
or
CEAB
to Ax or Bx
Set-up Time, HIGH or LOW
Ax or Bx to
LEBA
or
LEAB
Hold Time, HIGH or LOW
Ax or Bx to
LEBA
or
LEAB
LEBA
or
LEAB
Pulse Width LOW
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
FCT2543AT
Min.
(2)
Max.
1.5
6.5
FCT2543CT
Min.
(2)
Max.
1.5
5.3
Unit
ns
1.5
1.5
8
9
1.5
1.5
7
8
ns
ns
1.5
7.5
1.5
6.5
ns
2
2
5
—
—
—
2
2
5
—
—
—
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
电源技术
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
