FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13748-1E
16-bit Proprietary Microcontroller
CMOS
F
2
MC-16LX MB90860E Series
MB90867E(S), MB90F867E(S),
MB90V340E-101/102
■
DESCRIPTION
MB90860E-series with Flash ROM is especially designed for automotive and other industrial applications. With
the new 0.35
µm
CMOS technology, Fujitsu now offers on-chip Flash ROM program memory up to 512 Kbytes.
The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates a
major advantage in terms of EMI and power consumption.
The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external
4 MHz clock.
The unit features an 8 channel Output Compare Unit and 8 channel Input Capture Unit with 2 separate 16-bit free
running timers. 4 UARTs constitute additional functionality for communication purposes.
Note : F
2
MC is the abbreviation of FUJITSU Flexible Microcontroller.
Be sure to refer to the “Check Sheet” for the latest cautions on development.
“Check Sheet” is seen at the following support page
URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system
development.
Copyright©2006 FUJITSU LIMITED All rights reserved
MB90860E Series
■
FEATURES
•
CPU
• Instruction system best suited to controller
• Wide choice of data types (bit, byte, word, and long word)
• Wide choice of addressing modes(23 types)
• Enhanced multiply-divide instructions and RETI instructions
• Enhanced high-precision computing with 32-bit accumulator
• Instruction system compatible with high-level language (C language) and multitask
• Employing system stack pointer
• Enhanced various pointer indirect instructions
• Barrel shift instructions
• Increased processing speed
• 4-byte instruction queue
•
Serial interface
• UART (LIN/SCI) : up to 4 channels
• Equipped with full-duplex double buffer
• Clock-asynchronous or clock-synchronous serial transmission is available
• I
2
C interface* : up to 2 channels
• Up to 400 Kbits/s transfer rate
•
Interrupt controller
• Powerful interrupt function
• Powerful 8-level, 34-condition interrupt feature
• Up to 16 external interrupts are supported
• Automatic data transfer function independent of CPU
• Expanded intelligent I/O service function (EI
2
OS) : up to 16 channels
•
I/O port
• General-purpose input/output port (CMOS output)
- 80 ports (devices without S-suffix)
- 82 ports (devices with S-suffix)
•
8/10-bit A/D converter
• 8/10-bit A/D converter : 24 channels
• Resolution is selectable between 8-bit and 10-bit.
• Activation by external trigger input is allowed.
• Conversion time : 3
µs
(at 24-MHz machine clock, including sampling time)
• Program patch function
•
Timer
• Time-base timer, clock timer, watchdog timer : 1 channel
• 8/16-bit PPG timer : 8-bit
×
16 channels, or 16-bit
×
8 channels
• 16-bit reload timer : 4 channels
• 16-bit input/output timer
- 16-bit free run timer : 2 channel
(FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)
- 16-bit input capture: (ICU) : 8 channels
- 16-bit output compare : (OCU) : 8 channels
2
MB90860E Series
•
Variety of mode
• Low power consumption (standby) mode
• Sleep mode (a mode that halts CPU operating clock)
• Main timer mode (time-base timer mode that is transferred from main clock mode)
• PLL timer mode (time-base timer mode that is transferred from PLL clock mode)
• Watch mode (a mode that operates sub clock and clock timer only)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CPU blocking operation mode
•
Technology
• 0.35
µm
CMOS technology
* : I
2
C license :
Purchase of Fujitsu I
2
C components conveys a license under the Philips I
2
C Patent Rights to use, these com-
ponents in an I
2
C system provided that the system conforms to the I
2
C Standard Specification as defined by
Philips.
3
MB90860E Series
■
PRODUCT LINEUP
Part Number
MB90867E(S)
Parameter
CPU
Type
System clock
ROM
RAM
Emulator-specific
power supply*
1
MASK ROM product
F
2
MC-16LX CPU
Flash memory product
Evaluation product
On-chip PLL clock multiplier (×1,
×2, ×3, ×4, ×6,
1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz osc. PLL
×
6)
MASK ROM
128 Kbytes
6 Kbytes
⎯
Flash memory
128 Kbytes
6 Kbytes
External
30 Kbytes
Yes
MB90F867E(S)
MB90V340E-101/102
Technology
0.35
µm
CMOS with on-chip
0.35
µm
CMOS with on-chip voltage regulator for internal 0.35
µm
CMOS with on-chip
voltage regulator for internal power supply + Flash memory voltage regulator for internal
power supply
with on-chip charge pump for power supply
programming voltage
3.5 V to 5.5 V : at normal operating (not using A/D converter)
4.0 V to 5.5 V : at using A/D converter/Flash programming
4.5 V to 5.5 V : at using external bus
−40 °C
to
+105 °C
QFP-100, LQFP-100
4 channels
5 V
±
10%
⎯
PGA-299
5 channels
Operating
voltage range
Temperature range
Package
UART
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
2 channels
24 channels
10-bit or 8-bit resolution
Conversion time : Min 3
µs
include sample time (per one channel)
Operation clock frequency : fsys/2
1
, fsys/2
3
, fsys/2
5
(fsys
=
Machine clock frequency)
Supports External Event Count function
Signals an interrupt when overflowing
Supports Timer Clear when a match with Output Compare (ch.0, ch.4)
Operation clock freq. : fsys, fsys/2
1
, fsys/2
2
, fsys/2
3
, fsys/2
4
, fsys/2
5
, fsys/2
6
, fsys/2
7
(fsys
=
Machine clock freq.)
I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3
I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7
Signals an interrupt when 16-bit I/O Timer match output compare registers.
A pair of compare registers can be used to generate an output signal.
Rising edge, falling edge or rising & falling edge sensitive
Signals an interrupt upon external event
(Continued)
I
2
C (400 kbps)
8/10-bit
A/D converter
16-bit reload timer
(4 channels)
16-bit
I/O timer
(2 channels)
16-bit output
compare
(8 channels)
16-bit input capture
(8 channels)
4
MB90860E Series
(Continued)
Part Number
MB90867E(S)
Parameter
Supports 8-bit and 16-bit operation modes
Sixteen 8-bit reload counters
8/16-bit
Sixteen 8-bit reload registers for L pulse width
programmable pulse Sixteen 8-bit reload registers for H pulse width
generator
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as
(8 channels)
8-bit prescaler plus 8-bit reload counter
Operation clock freq. : fsys, fsys/2
1
, fsys/2
2
, fsys/2
3
, fsys/2
4
or 128
µs@fosc =
4 MHz
(fsys
=
Machine clock frequency, fosc
=
Oscillation clock frequency)
CAN interface
External interrupt
(16 channels)
D/A converter
Up to 100 kHz
sub clock for low
power operation
Devices without ‘S’-suffix
⎯
3 channels
Can be used rising edge, falling edge, starting up by H/L level input, external interrupt,
expanded intelligent I/O services (EI
2
OS) and DMA
⎯
2 channels
Only for MB90V340E-
102
MB90F867E(S)
MB90V340E-101/102
I/O ports
Virtually all external pins can be used as general purpose I/O port
All push-pull outputs
Bit-wise settable as input/output or peripheral signal
Settable in pin-wise of 8 as CMOS schmitt trigger/automotive inputs (default)
TTL input level settable for external bus (32-pin only for external bus)
Supports automatic programming, Embedded Algorithm
TM
*
2
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Number of erase cycles : 10,000 times
Data retention time : 20 years
Boot block configuration
Erase can be performed on each block
Block protection with external programming voltage
Flash Security Feature for protecting the content of the Flash
Flash memory
⎯
*1 : It is setting of Jumper switch (TOOL VCC) when Emulator (MB2147-01) is used.
Please refer to the Emulator hardware manual about details.
*2 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.
5
NXP MCU
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