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MB91F233PFF-GE1

产品描述32-bit Microcontroller
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小291KB,共66页
制造商FUJITSU(富士通)
官网地址http://edevice.fujitsu.com/fmd/en/index.html
标准
下载文档 详细参数 全文预览

MB91F233PFF-GE1概述

32-bit Microcontroller

MB91F233PFF-GE1规格参数

参数名称属性值
是否Rohs认证符合
厂商名称FUJITSU(富士通)
零件包装代码QFP
包装说明LFQFP, QFP120,.63SQ,16
针数120
Reach Compliance Codecompli
具有ADCYES
地址总线宽度
位大小32
CPU系列FR60
最大时钟频率4.2 MHz
DAC 通道YES
DMA 通道NO
外部数据总线宽度
JESD-30 代码S-PQFP-G120
JESD-609代码e6
长度14 mm
I/O 线路数量96
端子数量120
最高工作温度85 °C
最低工作温度-40 °C
PWM 通道NO
封装主体材料PLASTIC/EPOXY
封装代码LFQFP
封装等效代码QFP120,.63SQ,16
封装形状SQUARE
封装形式FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度)260
电源3.3,5 V
认证状态Not Qualified
RAM(字节)16384
ROM(单词)262144
ROM可编程性FLASH
座面最大高度1.7 mm
速度33.6 MHz
最大供电电压5.25 V
最小供电电压4 V
标称供电电压5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Bismuth (Sn/Bi)
端子形式GULL WING
端子节距0.4 mm
端子位置QUAD
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度14 mm
uPs/uCs/外围集成电路类型MICROCONTROLLER, RISC

MB91F233PFF-GE1文档预览

FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-16506-1E
32-bit Microcontroller
CMOS
FR60Lite
MB91230 Series
MB91233L/MB91F233/MB91F233L/MB91V230
s
DESCRIPTION
The MB91230 series is a line of standard microcontrollers, based on a 32-bit high-performance RISC CPU and
containing variety of I/O resources, for embedded control applications which require high CPU performance at
high speed processing.
Audio motor control storage : Designed to specifications for embedded control applications which high CPU
performance power processing.
The MB91230 series belongs to the FR60Lite family.
s
FEATURES
• 32-bit RISC, load/store architecture with a 5 stage pipeline
• Maximum operating frequency: 33.6 MHz (oscillation frequency
=
4.2 MHz, oscillation frequency 8-multiplier
(PLL clock multiplication method) )
• 16-bit fixed length instructions (basic instructions)
• Execution speed of instructions : 1 instruction per cycle
(Continued)
s
PACKAGES
401-pin Ceramic PGA
120-pin Plastic LQFP
128-pin plastic FLGA
(PGA-401C-A02)
(FPT-120P-M05)
(LGA-128P-M01)
MB91230 Series
(Continued)
• Memory-to-memory transfer, bit handling, and barrel shift instructions, etc. : Instructions suitable for embedded
applications
• Function entry/exit instructions, multiple-register load/store instructions : Instructions adapted for C-language
• Register interlock function : Facilitates coding in assembler
• Built-in multiplier with instruction-level support
- 32-bit multiplication with sign : 5 cycles
- 16-bit multiplication with sign : 3 cycles
• Interrupt (PC and PS save) : 6 cycles (16 priority levels)
• Harvard architecture allowing program access and data access to be executed simultaneously
• Instruction compatible with FR family
• Capacity of built-in ROM and ROM type
- MASK ROM
: 256 KB
- FLASH ROM : 256 KB
• Capacity of built-in RAM : 16 KB
• General-purpose ports : Maximum 98 ports (including N-ch open-drain port : 4 ports)
• A/D converter (series-parallel type)
- Resolution : 10-bit : 8 ch (4 ch
×
2 unit)
- Conversion time : 1.69
µs
(Minimum conversion time)
• D/A converter (R-2R type)
- Resolution : 8-bit : 2 ch (independence)
- Conversion speed : 0.6
µs
(when load capacitance 20 pF)
• External interrupt input : 16 ch
• Bit search module (for REALOS)
- Function for searching the MSB (Upper bit) in each word for the first “0” or “1” inverted point
• UART (full-duplex double buffer) : 4 ch
- Selectable parity On/Off
- Asynchronous (start-stop synchronized) or clock-synchronous communications selectable
- Internal timer for dedicated baud rate (U-timer) on each channel
- External clock can be used as transfer clock
- Error detection function for parity, frame and overrun
• PPG : 16-bit
×
6 ch
• Up/down counter : 2 ch (8-bit
×
2 ch or 16-bit
×
1 ch)
• Reload timer : 16-bit
×
4 ch
• Free-run timer : 16-bit
×
2 ch
• Watch timer : 15-bit
×
1 ch
• PWC : 8-bit
×
2 ch
• Input capture : 2 ch (interface with free-run timer 0)
• Output compare : 4 ch (free-run timer 0 and output compare unit 0/1 cooperate, free-run timer 1 and
output compare units 2/3)
• LCD controller : SEG00 to SEG31/COM0 to COM3 (also serving as a port)
• Clock monitor (peripheral clock output function) : 1 ch
• Timebase/watchdog timer (26-bit)
• Real-time clock (counting even with the real-time clock stopped)
• Low Power Consumption Mode
• Sleep/stop function
• Package : LQFP-120, FLGA-128
• Technology : CMOS 0.35
µm
• Power supply
• Dual power supply configuration [internal logic 3.3 V, I/O 5.5 V(3.3 V for ADC and DAC input/output)]
Note : Do not set the external bus mode in which the MB91230 series cannot operate.
2
MB91230 Series
s
PIN ASSIGNMENT
MB91233L, MB91F233, MB91F233L
(TOP VIEW)
P25/SOT2
P24/SIN2
P23/PWI1/OP3
P22/PWI0/OP2
P21/CKI1/OP1
P20/CKI0/OP0
P17/INT7
P16/INT6
P15/INT5
P14/INT4
P13/INT3
P12/INT2
X0
X1
V
SS
V
CC
P11/INT1
P10/INT0
P07/IC1
P06/IC0
P05/SCK1
P04/SOT1
P03/SIN1
P02/SCK0
P01/SOT0
P00/SIN0
V3
V2
V1
V0
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
P26/SCK2
P27/SIN3
P30/SOT3
P31/SCK3
P32/AIN0
P33/BIN0
P34/ZIN0
P35/AIN1
P36/BIN1
P37/ZIN1
P40/PPG0
P41/PPG1
X0A
X1A
V
CC
3B
V
SS
V
CC
3
P42/PPG2
P43/PPG3
P44/TOT0
P45/TOT1
P46/TOT2
P47/CKOT
P50/INT8
P51/INT9
P52/INT10
P53/INT11/PPG4
P54/INT12/PPG5
P55/INT13/TIN2
P56/INT14/TIN1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
INIT
MD0
MD1
MD2
P73/COM3
P72/COM2
P71/COM1
P70/COM0
P67/SEG31
P66/SEG30
P65/SEG29
P64/SEG28
PB3/SEG27
PB2/SEG26
V
SS
V
CC
PB1/SEG25
PB0/SEG24
PA7/SEG23
PA6/SEG22
PA5/SEG21
PA4/SEG20
PA3/SEG19
PA2/SEG18
PA1/SEG17
PA0/SEG16
P97/SEG15
P96/SEG14
P95/SEG13
P94/SEG12
P57/INT15/TIN0/ADTG0
PF3/TOT3
PF4/TIN3/ADTG1
PD0/DA0
PD1/DA1
AV
CC
AVRH
AV
SS
PC0/AN0
PC1/AN1
PC2/AN2
PC3/AN3
PC4/AN4
PC5/AN5
PC6/AN6
PC7/AN7
V
SS
V
CC
3IO
P80/SEG0
P81/SEG1
P82/SEG2
P83/SEG3
P84/SEG4
P85/SEG5
P86/SEG6
P87/SEG7
P90/SEG8
P91/SEG9
P92/SEG10
P93/SEG11
* : Open-drain
(FPT-120P-M05)
(Continued)
3
MB91230 Series
(Continued)
MB91F233L
M
L
K
J
H
G
F
E
D
C
B
A
M1
L1
K1
J1
H1
G1
F1
E1
D1
C1
B1
A1
M2
L2
K2
J2
H2
G2
F2
E2
D2
C2
B2
A2
M3
L3
K3
J3
H3
G3
F3
E3
D3
C3
B3
A3
M4
L4
K4
J4
H4
G4
M5
L5
K5
J5
M6
L6
K6
J6
M7
L7
K7
J7
M8
L8
K8
J8
M9
L9
K9
J9
H9
G9
M10 M11 M12
L10
K10
J10
H10
G10
F10
E10
D10
C10
B10
A10
L11
K11
J11
H11
G11
F11
E11
D11
C11
B11
A11
L12
K12
J12
H12
G12
F12
E12
D12
C12
B12
A12
TOP VIEW
F4
E4
D4
C4
B4
A4
D5
C5
B5
A5
D6
C6
B6
A6
D7
C7
B7
A7
D8
C8
B8
A8
F9
E9
D9
C9
B9
A9
1
2
3
4
5
6
7
8
9
10
11
12
INDEX
(LGA-128P-M01)
4
MB91230 Series
Pin correspondence table of LQFP-120 and FLGA-128 in MB91230 series (LGA-128P-M01)
FLGA-128
FLGA-128
FLGA-128
LQFP-120
No.
Signal
LQFP-120
No.
Signal
LQFP-120
No.
No.
(JEDEC
name
No.
(JEDEC
name
No.
(JEDEC
No.)
No.)
No.
)
1
120
117
114
109
107
103
100
97
94
91
4
118
115
112
110
106
104
99
96
92
88
90
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
P26/SCK2
P25/SOT2
P22/PWI0/
OP2
P17/INT7
*5
P12/INT2
X1
P10/INT0
P05/SCK1
P02/SCK0
V3
V0
P31/SCK3
P23/PWI1/
OP3
P20/CKI0/
OP0
P15/INT5
P13/INT3
V
SS
P11/INT1
P04/SOT1
P01/SOT0
V1
MD1
INIT
98
93
85
87
10
6
8
119
111
101
95
89
86
82
84
13
9
12
5
81
83
80
C9
C10
C11
C12
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
E1
E2
E3
E4
E9
E10
E11
E12
P03/SIN1
V2
P72/COM2
MD2
P37/ZIN1
P33/BIN0
P35/AIN1
P24/SIN2
P14/INT4
*5
P06/IC0
P00/SIN0
MD0
P73/COM3
P67/
SEG31*
1
P71/COM1
X0A
P36/BIN1
P41/PPG1
P32/AIN0
P66/
SEG30*
1
P70/COM0
P65/
SEG29*
1
*5
18
15
*2
17
71
75
74
77
21
19
23
20
65
72
69
73
24
22
26
29
35
40
47
50
G1
G2
G3*
4
G4
G9
G10
G11
G12
H1
H2
H3
H4
H9
H10
H11
H12
J1
J2
J3
J4
J5
J6
J7
J8
Signal
name
P42/PPG2
V
CC
3B
V
CC
3*
4
V
CC
3
PA6/
SEG22
V
CC
PB1/
SEG25
PB2/
SEG26
P45/TOT1
P43/PPG3
P47/CKOT
P44/TOT0
PA0/
SEG16
PA7/
SEG23
PA4/
SEG20
PB0/
SEG24
P50/INT8
P46/TOT2
P52/INT10
P55/INT13/
TIN2
PD1/DA1
PC1/AN1
V
SS
P81/SEG1
(Continued)
5

 
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