FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12617-1E
8-bit Proprietary Microcontrollers
CMOS
F MC-8FX MB95100B Series
MB95107B/F108BS/F108BW/R107B/D108BS/
MB95D108BW/FV100D-101
■
DESCRIPTION
The MB95100B series is general-purpose, single-chip microcontrollers. In addition to a compact instruction set,
the microcontrollers contain a variety of peripheral functions.
2
Note : F
2
MC is the abbreviation of FUJITSU Flexible Microcontroller.
■
FEATURE
•
F
2
MC-8FX CPU core
Instruction set optimized for controllers
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instruction
• Bit manipulation instructions etc.
•
Clock
• Main clock
• Main PLL clock
• Sub clock (for dual clock product)
• Sub PLL clock (for dual clock product)
(Continued)
Be sure to refer to the “Check Sheet” for the latest cautions on development.
“Check Sheet” is seen at the following support page
URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system
development.
Copyright©2006 FUJITSU LIMITED All rights reserved
MB95100B Series
(Continued)
•
Timer
• 8/16-bit compound timer
×
2 channels
• 16-bit reload timer
• 8/16-bit PPG
×
2 channels
• 16-bit PPG
×
2 channels
• Timebase timer
• Watch prescaler (for dual clock product)
•
FRAM
2K bytes FRAM is loaded (MB95R107B/MB95D108BS/MB95D108BW only)
•
LIN-UART
• Full duplex double buffer
• Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
•
UART/SIO
• Full duplex double buffer
• Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
•
I
2
C*
Built-in wake-up function
•
External interrupt
• Interrupt by edge detection (rising, falling, or both edges can be selected)
• Can be used to recover from low-power consumption (standby) modes.
•
8/10-bit A/D converter
8-bit or 10-bit resolution can be selected.
•
Low-power consumption (standby) mode
• Stop mode
• Sleep mode
• Watch mode (for dual clock product)
• Timebase timer mode
•
I/O port
• The number of maximum ports
•
Single clock product : 55 ports
•
Dual clock product : 53 ports
• Port configuration
•
General-purpose I/O ports (N-ch open drain)
Other than MB95D108BS/MB95D108BW/MB95R107B : 6 ports
MB95D108BS/MB95D108BW/MB95R107B
: 4 ports
•
General-purpose I/O ports (CMOS)
Single clock product
: 49 ports
Dual clock product
: 47 ports
* : Purchase of Fujitsu I
2
C components conveys a license under the Philips I
2
C Patent Rights to use, these
components in an I
2
C system provided that the system conforms to the I
2
C Standard Specification as defined
by Philips.
2
MB95100B Series
■
PRODUCT LINEUP
Part number
MB95107B
Parameter
Type
ROM capacity
RAM capacity
FRAM capacity
Reset output
Option*
4
Clock system
Low voltage
detection reset
Number of basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Interrupt processing time
Selectable
Single/Dual clock*
1
Single/Dual clock*
2
No
No
Selectable
Single/Dual clock*
1
No
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8, and 16 bits
: 61.5 ns (at machine clock frequency 16.25 MHz)
: 0.6
µs
(at machine clock frequency 16.25 MHz)
Single/Dual clock*
2
MASK ROM
product
48K bytes
MB95F108BS/
MB95F108BW
Flash memory
product
60K bytes
2K bytes
2K bytes
MB95R107B*
3
MASK ROM
product
48K bytes
MB95D108BS/
MB95D108BW
Flash memory
product
60K bytes
CPU functions
General purpose
I/O ports
Timebase timer
Watchdog timer
Wild register
Peripheral functions
•
Single clock product : 55 ports (N-ch open drain *
5
: 4/6 ports, CMOS : 49 ports)
•
Dual clock product : 53 ports (N-ch open drain *
5
: 4/6 ports, CMOS : 47 ports)
Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)
Reset generated cycle
At main oscillation clock 10 MHz
: Min 105 ms
At sub oscillation clock 32.768 kHz (for dual clock product) : Min 250 ms
Capable of replacing 3 bytes of ROM data
Master/slave sending and receiving
Bus error function and arbitration function
Detecting transmitting direction function
Start condition repeated generation and detection functions
Built-in wake-up function
Data transfer capable in UART/SIO
Full duplex double buffer, Variable data length (5/6/7/8-bit), built-in baud rate generator
NRZ type transfer format, error detected function
LSB-first or MSB-first can be selected.
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
Dedicated reload timer allowing a wide range of communication speeds to be set.
Full duplex double buffer.
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
LIN functions available as the LIN master or LIN slave.
8-bit or 10-bit resolution can be selected.
(Continued)
I
2
C
UART/SIO
LIN-UART
8/10-bit A/D
converter
(12 channels)
3
MB95100B Series
(Continued)
Part number
MB95107B
Parameter
MB95F108BS/
MB95F108BW
MB95R107B*
3
MB95D108BS/
MB95D108BW
Two clock modes and two counter operating modes can be selected. Square wave form
output
16-bit reload timer
Count clock : 7 internal clocks and external clock can be selected.
Counter operating mode : reload mode or one-shot mode can be selected.
Each channel of the timer can be used as “8-bit timer
×
2 channels” or “16-bit timer
×
1
channel”.
8/16-bit compound
Built-in timer function, PWC function, PWM function, capture function and square
timer (2 channels)
wave form output
Count clock : 7 internal clocks and external clock can be selected.
16-bit PPG
(2 channels)
Peripheral functions
8/16-bit PPG
(2 channels)
Watch counter
(for dual clock
product)
Watch prescaler
(for dual clock
product)
External interrupt
(12 channels)
PWM mode or one-shot mode can be selected.
Counter operating clock : Eight selectable clock sources
Support for external trigger start
Each channel of the PPG can be used as
“
8-bit PPG
×
2 channels
”
or
“
16-bit PPG
×
1
channel
”
.
Counter operating clock : Eight selectable clock sources
Count clock : Four selectable clock sources (125 ms, 250 ms, 500 ms, or 1 s)
Counter value can be set from 0 to 63. (Capable of counting for 1 minute when selecting
clock source 1 second and setting counter value to 60)
4 selectable interval times (125 ms, 250 ms, 500 ms, or 1 s)
Interrupt by edge detection (rising, falling, or both edges can be selected.)
Can be used to recover from standby modes.
Supports automatic programming, Embedded Algorithm
TM
*
6
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Number of write/erase cycles (Minimum) : 10000 times
Data retention time : 20 years
Erase can be performed on each block
Boot block configuration
Block protection with external programming voltage
Flash Security Feature for protecting the content of the Flash
Sleep, stop, watch (for dual clock product), and timebase timer
Flash memory
Standby mode
*1 : Specify clock mode when ordering MASK ROM.
*2 : MB95F108BS/MB95D108BS is single clock and MB95F108BW/MB95D108BW is dual clock.
*3 : This device is under development.
*4 : For details of option, refer to “■ MASK OPTION”.
*5 : MB95D108BS/D108BW/R107B contain 4 general-purpose I/O ports for N-ch open drain. Port number other
than MB95D108BS/D108BW/R107B has 6 general-purpose I/O ports for N-ch open drain.
*6 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.
Note : Part number of the evaluation products in MB95100B series is MB95FV100D-101. When using it, the MCU
board (MB2146-301A) is required.
4
MB95100B Series
■
SELECT OF OSCILLATION STABILIZATION WAIT TIME (MASK ROM PRODUCT ONLY)
For the MASK ROM product, you can set the mask option when ordering MASK ROM to select the initial value
of main clock oscillation stabilization wait time from among the following four values.
Note that the evaluation and Flash memory products are fixed their initial value of main clock oscillation stabili-
zation wait time at the maximum value.
Select of oscillation stabilization wait time
(2
2
−
2) /F
CH
(2
12
−
2) /F
CH
(2
13
−
2) /F
CH
(2
14
−
2) /F
CH
Remarks
0.5
µs
(at main oscillation clock 4 MHz)
Approx. 1.02 ms (at main oscillation clock 4 MHz)
Approx. 2.05 ms (at main oscillation clock 4 MHz)
Approx. 4.10 ms (at main oscillation clock 4 MHz)
■
PACKAGES AND CORRESPONDING PRODUCTS
Part number
Package
FPT-64P-M03
FPT-64P-M09
BGA-224P-M08
: Available
: Unavailable
MB95107B
MB95R107B
MB95F108BS/F108BW
MB95D108BS/D108BW
MB95FV100D-101
5
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