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TRF6900
SINGLE-CHIP RF TRANSCEIVER
SLAS213G – SEPTEMBER 1999 – REVISED MAY 2001
D
D
D
D
D
D
D
D
D
Single-Chip RF Transceiver for 868-MHz
and 915-MHz ISM Bands
850-MHz to 950-MHz Operation
FM/FSK Operation for Transmit and
Receive
24-Bit Direct Digital Synthesizer (DDS) With
11-Bit DAC
On-Chip VCO and PLL
On-Chip Reference Oscillator
Minimal External Components Required
Low Power Consumption
Typical Output Power of 4.5 dBm
D
D
D
D
D
D
D
Typical Output Frequency Resolution of
230 Hz
Ultrafast Lock Times From DDS
Implementation
Two Fully-Programmable Operational
Modes
2.2-V to 3.6-V Operation
Fast Radio Strength Signal Indicator (RSSI)
Flexible Serial Interface to TI MSP430
Microcontroller
48-Pin Low-Profile Plastic Quad Flat
Package (PQFP)
PQFP PACKAGE
(TOP VIEW)
48 47 46 45 44 43 42 41 40 39 38 37
IF1_IN
IF1_OUT
IF_GND
IF2_IN
DEM_GND
VREF
LNA_VCC
LNA_OUT
MIX_IN
MIX_VCC
MIX_OUT
MIX_GND
LNA_GND
LNA_IN
LNA_GND
PA_VCC
PA_OUT
PA_GND
PLL_GND
PD_SET
PD_OUT2
PD_OUT1
LOCKDET
PLL_VCC
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
36
35
34
33
32
31
30
29
28
27
26
25
DEM_VCC
DEM_TANK
DEM_TANK
RSSI_OUT
AMP_IN
AMP_CAP
AMP_OUT
S&H_CAP
DATA_OUT
DATA
CLOCK
STROBE
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
VCO_TANK1
VCO_TANK2
DDS_GND
STDBY
MODE
DDS_VCC
TX_DATA
DIG_VCC
DIG_GND
GND
XOSC1
XOSC2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2001, Texas Instruments Incorporated
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1
TRF6900
SINGLE-CHIP RF TRANSCEIVER
SLAS213G – SEPTEMBER 1999 – REVISED MAY 2001
description
The TRF6900 single-chip solution is an integrated circuit intended for use as a low cost FSK transceiver to
establish a frequency-agile, half-duplex, bidirectional RF link. The device is available in a 48-lead TQFP
package and is designed to provide a fully-functional multichannel FM transceiver. The chip is intended for linear
(FM) or digital (FSK) modulated applications in the new 868-MHz European band and the North American
915-MHz ISM band. The single chip transceiver operates down to 2.2 V and is expressly designed for low power
consumption. The synthesizer has a typical channel spacing of approximately 230 Hz to allow narrow-band as
well as wide-band applications. Due to the narrow channel spacing of the direct digital synthesizer (DDS), the
DDS can be used to adjust the TX/RX frequency and allows the use of inexpensive reference crystals.
Two fully-programmable operation modes, Mode0 and Mode1, allow extremely fast switching between two
preprogrammed settings (e.g., receive(RX)/transmit(TX); TX_frequency_0/TX_frequency_1;
RX_frequency_0/RX_frequency_1;…) without reprogramming the device. Each functional block of the
transceiver can be specifically enabled or disabled via the serial interface.
ISM band standards
Europe has assigned a new unlicensed frequency band of 868 MHz to 870 MHz. This new band is specifically
defined for short range devices with duty cycles from 0.1% to 100% in several sub-bands. The existing 433 MHz
band for short-range devices in Europe has the great disadvantage of very high usage. The new European
frequency band allows a reliable RF link and makes many new applications possible due to the duty cycle
assignment.
The North American unlicensed ISM (industrial, scientific, and medical) band covers 902 MHz to 928 MHz
(center frequency of 915 MHz) and is suitable for short range RF links.
transmitter
The transmitter consists of an integrated VCO, a complete fully-programmable direct digital synthesizer, and
a power amplifier. The internal VCO can be used with an external tank circuit or an external VCO. The divider,
prescaler, and reference oscillator require only the addition of an external crystal and a loop filter to provide a
complete DDS with a typical frequency resolution of 230 Hz.
The 8-bit FSK frequency deviation register determines the frequency deviation in FSK mode. The modulation
itself is done in the direct digital synthesizer, hence no additional external components are necessary.
Since the typical RF output power is approximately 4.5 dBm, no additional external RF power amplifier is
necessary in most applications.
receiver
The integrated receiver is intended to be used as a single-conversion FSK receiver. It consists of a low-noise
amplifier, mixer, IF amplifier, limiter, FM/FSK demodulator with an external LC tank circuit, and a data slicer. The
receive strength signal indicator (RSSI) can be used for fast carrier sense detection or as an on/off keying,
or amplitude shift keying, (OOK/ASK) demodulator. In the
learning mode,
during a learning sequence
(0,1,0,1,0,....), the initial tolerances of the LC demodulator tank circuit are compensated and an external
capacitor is charged to a dc voltage that is proportional to the average demodulation dc level. This level is the
zero reference for the data slicer to generate the logical levels of the data sequence that follow the learning
sequence. Using the internal data switch, the demodulated OOK and FSK signals are available at the same
DATA_OUT terminal.
baseband interface
The TRF6900 can easily be interfaced to a baseband processor such as the Texas Instruments MSP430
ultralow-power microcontroller (see Figure 1). The TRF6900 serial control registers are programmed by the
MSP430 and the MSP430 performs baseband operations in software.
2
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DALLAS, TEXAS 75265
TRF6900
SINGLE-CHIP RF TRANSCEIVER
SLAS213G – SEPTEMBER 1999 – REVISED MAY 2001
Antenna
RF Section
RSSI_OUT
TX_DATA
RF In
LNA_IN
PA_OUT
MODE
TRF6900
TRANSCEIVER
+
DISCRETES
STDBY
DATA
CLOCK
STROBE
DATA_OUT
LOCKDET
RF Out
RSSI Out (Analog Signal)
Transmit Data
Receive Data
Lock Detect
Mode Select
Standby
Serial Control Data
Serial Control Clock
Serial Control Strobe
Microcontroller
Section
MSP430
Family
µC
Programmable
Digital I/O Pins
Figure 1. System Block Diagram for Interfacing to the MSP430 Microcontroller
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
3
TRF6900
SINGLE-CHIP RF TRANSCEIVER
SLAS213G – SEPTEMBER 1999 – REVISED MAY 2001
functional block diagram
LNA_OUT
LNA_VCC
MIX_OUT
MIX_GND
MIX_VCC
IF1_OUT
MIX_IN
DEM_GND
38
37
36
35
RSSI
First IF
Amplifier
4
5
6
7
8
LPF Amplifier/
Post-Detection
Amplifier
31
Power
Amplifier
LO Buffer
Amplifier
Data Switch
Buffer
Amplifier
FM/FSK
Demodulator
IF_GND
IF1_IN
IF2_IN
48
47
46
45
44
43
42
41
40
39
LNA_GND
LNA_IN
LNA_GND
1
2
3
LNA
RF Buffer
Amplifier
RF
Mixer
Second IF
Amplifier/
Limiter
VREF
DEM_VCC
DEM_TANK
34
33
32
DEM_TANK
RSSI_OUT
AMP_IN
AMP_CAP
PA_VCC
PA_OUT
PA_GND
PLL_GND
PD_SET
30
Data
Slicer
29
28
PLL
27
Direct Digital Synthesizer
and
Power-Down Logic
VCO
13
VCO_TANK1
14
VCO_TANK2
15
DDS_GND
16
STDBY
17
MODE
18
DDS_VCC
19
TX_DATA
20
DIG_VCC
21
DIG_GND
22
GND
23
XOSC1
24
XOSC2
Serial
Interface
26
25
AMP_OUT
S&H_CAP
TRF6900
(TOP VIEW)
PD_OUT2 9
PD_OUT1
LOCKDET
PLL_VCC
10
11
12
DATA_OUT
DATA
CLOCK
STROBE
Terminal Functions
TERMINAL
NAME
AMP_CAP
AMP_IN
AMP_OUT
CLOCK
DATA
DATA_OUT
DDS_GND
NO.
31
32
30
26
27
28
15
I/O
I/O
I
O
I
I
O
DESCRIPTION
Connection for LPF amplifier/post-detection amplifier capacitor/resistor used to reduce the internal low pass
filter frequency and to adjust the post-detection gain
Analog post-detection amplifier input
Analog post-detection amplifier output
Serial interface clock signal
Serial interface data signal
Digital output of the data slicer, active high
Direct digital synthesizer ground
4
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