TABLE OF CONTENTS
Part I
S-75V Series [High speed operation version]
S-75V00ANC
S-75V02ANC
S-75V04ANC
S-75VU04ANC
S-75V08ANC
S-75V14ANC
S-75V32ANC
S-75V86ANC
Part II
S-75L Series [Low voltage operation version]
S-75L00ANC
S-75L02ANC
S-75L04ANC
S-75LU04ANC
S-75L08ANC
S-75L14ANC
S-75L32ANC
S-75L86ANC
[Single 2-Input NAND Gate]
[Single 2-Input NOR Gate]
[INVERTER]
[Single INVERTER without Buffer]
[Single 2-Input AND Gate]
[SCHMITT INVERTER]
[Single 2-Input OR Gate]
[EXCLUSIVE OR GATE]
25
28
31
34
37
40
43
46
[Single 2-Input NAND Gate]
[Single 2-Input NOR Gate]
[INVERTER]
[Single INVERTER without Buffer]
[Single 2-Input AND Gate]
[SCHMITT INVERTER]
[Single 2-Input OR Gate]
[EXCLUSIVE OR GATE]
1
4
7
10
13
16
19
22
SC-88A Package Specifications
Physical Dimensions
Taping Dimensions
Reel Dimensions
49
49
49
Seiko Instruments Inc.
Rev. 1.1
_00
Single 2-Input NAND Gate
S-75V00ANC
The S-75V00ANC is a single 2-Input NAND Gate fabricated by utilizing
advanced silicon-gate CMOS technology which provides the inherent
benefit of CMOS low power consumption to achieve ultra high speed
operation correspond to LSTTL IC’s.
All gates of the internal circuitry have buffered outputs to ensure high
noise immunity and output stability.
Input voltage is allowed to be applied even if power voltage is not supplied
because no diode is inserted between an input pin and V
CC
.
This allows for interfaces between power supplies of different voltage,
output level conversion from 5 V to 3 V and battery backup applications.
Features
•
•
•
•
•
•
Wide power supply range:
Low current consumption:
Typical propagation delay:
High noise immunity:
Power down protection:
Very small plastic package:
2 V to 5.5 V
1.0
µA
max. (at 5.5 V, 25°C)
tpd = 3.7 ns (at 5 V)
V
NIH
=V
NIL
=28% V
CC
min.
All pins
SC-88A
Applications
•
•
•
•
Personal computers, peripherals
Cellular phones
Cameras
Games
Pin Assignment
IN B
1
2
3
(Top view)
4
OUT Y
5
VCC
Marking
5
4
Model name
IN A
5V1
1
2
(Top view)
3
GND
Logic Diagram
True Values
IN B
IN A
OUT Y
A
L
L
H
H
B
L
H
L
H
Y
H
H
H
L
Seiko Instruments Inc.
1
Miniaturized Logic IC Family
S-75V00ANC
Ordering
Delivery form:
Model name:
Taping only
S-75V00ANC-5V1-TF
Rev.1.1
_00
Absolute Maximum Ratings
Ta=25
°C
Item
Power Supply Voltage
Input Voltage
Output Voltage
Input Parasitic Diode Current
Output Parasitic Diode Current
Output Current
V
CC
/GND Current
Power Dissipation
Storage Temp. Range
Lead Temperature (10 sec.)
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
Tstg
TL
Ratings
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+0.5
-20
±20
±25
±50
200
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mA
mW
°C
°C
Recommended Operating Conditions
Parameter
Power Voltage
Input Voltage
Output Voltage
Op. Temp. Range
Input Rise and Fall Time
Symbol
V
CC
V
IN
V
OUT
Topr
dt/dv
Standard
2 to 5.5
0 to 5.5
0 to V
CC
-40 to +85
0 to 100 (V
CC
=3.3±0.3V)
0 to 20 (V
CC
=5±0. 5V)
Unit
V
V
V
°C
ns/V
DC Characteristics
Parameter
"H" level
Input
Voltage
"L" level
V
IL
Sym.
V
IH
Conditions
V
CC
2.0
3 to 5.5
2.0
3 to 5.5
2.0
V
IN
=V
IL
"H" level
Output
Voltage
I
OL
=50µA
"L" level
V
OL
V
IN
=V
IH
I
OL
=4mA
I
OL
=8mA
Input Current
Current Consump.
I
IN
I
CC
V
IN
=5.5V or GND
V
IN
=V
CC
or GND
V
OH
or V
IH
I
OH
=-4mA
I
OH
=-8mA
I
OH
=-
50µA
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to 5.5
5.5
MIN.
1.5
V
CC
X0.7
1.9
2.9
4.4
2.58
3.94
Ta=25
°C
TYP.
2.0
3.0
4.5
0
0
0
MAX.
0.5
V
CC
X0.3
0.1
0.1
0.1
0.36
0.36
±0.1
1.0
Ta=-40 to 85
°C
MIN.
1.5
V
CC
X0.7
1.9
2.9
4.4
2.48
3.80
MAX.
0.5
V
CC
X0.3
0.1
0.1
0.1
0.44
0.44
±1.0
10.0
µA
µA
V
V
Unit
2
Seiko Instruments Inc.
Rev.1.1
_00
AC Characteristics
Miniaturized Logic IC Family
S-75V00ANC
Input
t
r =
t
f = 3 ns (unless otherwise specified)
Parameter
Sym.
Measurement Conditions
V
CC
(V)
3.3±0.3
C
L
(pF)
15
50
15
50
MIN.
Ta=25°C
TYP.
5.5
10.0
3.7
6.1
4
14
MAX.
7.9
14.0
5.5
8.5
10
Ta=-40 to 85°C
MIN.
1.0
1.0
1.0
1.0
MAX.
9.5
15.0
6.5
9.0
10
Unit
Output Rise/Fall time
t
pLH
t
pHL
nS
5.0±0.5
C
IN
pF
Input Capacitance
1
C
PD
pF
Equiv. Int. Capacitance
Note
1
Note C
PD
is the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown
below.
Current consumption is averaged by the following equation.
I
CC(opr)
=C
PD
V
CC
fin+I
CC
Measurement Circuit
3ns
90%
10%
3ns
VCC
VIN
50%
GND
PG
50Ω
VIN
VOUT
tp
HL
CL
VOUT
50%
tp
LH
50%
VOH
VOL
Remark
No-load output during measurement of current consumption.
Input Pin Equivalent Circuit
Input pin
Seiko Instruments Inc.
3
Rev.1.1
_00
Single 2-Input NOR Gate
S-75V02ANC
The S-75V02ANC is a single 2-intput NOR gate fabricated by utilizing
advanced silicon-gate CMOS technology which provides the inherent
benefit of CMOS low power consumption to achieve ultra high speed
operation correspond to LSTTL IC’s.
All gates of the internal circuitry have buffered outputs to ensure high
noise immunity and output stability.
Input voltage is allowed to be applied even if power voltage is not supplied
because no diode is inserted between an input pin and V
CC
.
This allows for interfaces between power supplies of different voltage,
output level conversion from 5 V to 3 V and battery backup applications.
Features
•
•
•
•
•
•
Wide power supply range:
Low current consumption:
Typical propagation delay:
High noise immunity:
Power down protection:
Very small plastic package:
2 V to 5.5 V
1.0
µA
max. (at 5.5 V, 25°C)
tpd = 3.6 ns (at 5 V)
V
NIH
=V
NIL
=28% V
CC
min.
All pins
SC-88A
Applications
•
•
•
•
Personal computers, peripherals
Cellular phones
Cameras
Games
Pin Assignment
IN B
IN A
GND
1
2
3
4
OUT Y
5
VCC
Marking
5
4
Model name
5V3
1
(Top view)
2
(Top view)
3
Logic Diagram
True Values
IN B
IN A
OUT Y
A
L
L
H
H
B
L
H
L
H
Y
H
L
L
L
4
Seiko Instruments Inc.
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