MB95F314E/F314L/F316E/F316L/F318E/F318L
MB95F374E/F374L/F376E/F376L/F378E/F378L
New 8FX MB95310L/370L Series
8-bit Microcontrollers
MB95310L/370L is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the
microcontrollers of this series contain a variety of peripheral resources.
Features
F
2
MC-8FX CPU core
Instruction set optimized for controllers
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External interrupt
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Multiplication and division instructions
16-bit arithmetic operations
Bit test branch instructions
Bit manipulation instructions, etc.
Interrupt by edge detection (rising edge, falling edge, and both
edges can be selected)
Can be used to wake up the device from different low power
consumption (standby) modes
8/10-bit A/D converter
8-bit or 10-bit resolution can be selected
Clock
Selectable main clock source
❐
❐
❐
❐
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LCD controller (LCDC)
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Main OSC clock (up to 16.25 MHz, maximum machine clock
frequency: 8.125 MHz)
External clock (up to 32.5 MHz, maximum machine clock
frequency: 16.25 MHz)
Main CR clock (1/8/10/12.5 MHz
2%,
maximum machine
clock frequency: 12.5 MHz)
Main PLL clock (up to 16.25 MHz, maximum machine clock
frequency: 16.25 MHz)
40 SEG
4 COM
(MB95F314E/F314L/F316E/F316L/F318E/F318L)
32 SEG
4 COM
(MB95F374E/F374L/F376E/F376L/F378E/F378L)
Internal divider resistor
With blinking function
Low power consumption (standby) modes
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Selectable subclock source
❐
Sub-OSC clock (32.768 kHz)
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External clock (32.768 kHz)
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Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 200 kHz)
8/16-bit composite timer
8/16-bit PPG
16-bit reload timer
Event counter
Time-base timer
Watch prescaler
Stop mode
Sleep mode
Watch mode
Time-base timer mode
Timer
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I/O port
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MB95F314E/F314L/F316E/F316L/F318E/F318L (maximum
no. of I/O ports: 71)
General-purpose I/O ports (N-ch open drain): 3
General-purpose I/O ports (CMOS I/O): 68
MB95F374E/F374L/F376E/F376L/F378E/F378L (maximum
no. of I/O ports: 55)
General-purpose I/O ports (N-ch open drain): 3
General-purpose I/O ports (CMOS I/O): 52
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UART-SIO
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Capable of clock-asynchronous (UART) serial data transfer
and clock-synchronous (SIO) serial data transfer
Full duplex double buffer
On-chip debug
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1-wire serial control
Serial writing supported (asynchronous mode)
I
2
C
Built-in wake-up function
Hardware/software watchdog timer
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Built-in hardware watchdog timer
Built-in software watchdog timer
Cypress Semiconductor Corporation
Document Number: 002-07519 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised April 06, 2016
MB95310L/370L Series
Low-voltage detection reset circuit
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Programmable port input voltage level
CMOS input level / hysteresis input level
Built-in low-voltage detector
Three configurable low-voltage detection levels for generating
reset
Five configurable low-voltage detection levels for generating
interrupts
Dual operation Flash memory
The program/erase operation and the read operation can be
executed in different banks (upper bank/lower bank) simulta-
neously.
Clock supervisor counter
Built-in clock supervisor counter function
Flash memory security function
Protects the content of the Flash memory
Document Number: 002-07519 Rev. *A
Page 2 of 80
MB95310L/370L Series
Contents
Product Line-up ................................................................ 3
Oscillation Stabilization Wait Time ................................. 7
Packages And Corresponding Products ........................ 7
Differences Among Products And Notes On
Product Selection ............................................................. 8
Pin Assignment ................................................................ 9
Pin Description (MB95310L Series) .............................. 11
Pin Description (MB95370L Series) .............................. 16
I/O Circuit Type ............................................................... 20
Notes On Device Handling ............................................. 22
Pin Connection ............................................................... 23
Recommended Layout ................................................... 24
Block Diagram (MB95310L Series) ............................... 25
Block Diagram (MB95370L Series) ............................... 26
CPU Core ......................................................................... 26
I/O Map (MB95310L Series) ............................................ 28
I/O Map (MB95370L Series) ............................................ 34
Interrupt Source Table ................................................... 39
Electrical Characteristics ............................................... 40
Absolute Maximum Ratings ....................................... 40
Recommended Operating Conditions ....................... 42
DC Characteristics .................................................... 43
AC Characteristics ..................................................... 47
Clock Timing .............................................................. 47
Source Clock/Machine Clock .................................... 49
External Reset ........................................................... 52
Power-on Reset ......................................................... 54
Peripheral Input Timing ............................................. 55
UART/SIO, Serial I/O Timing ..................................... 56
Low-voltage Detection ............................................... 58
I2C Timing ................................................................. 60
A/D Converter ............................................................ 65
A/D Converter Electrical Characteristics ................... 65
Notes on Using the A/D Converter ............................ 66
Definitions of A/D Converter Terms ........................... 67
Flash Memory Program/Erase Characteristics .......... 69
Sample Characteristics .................................................. 71
Mask Options .................................................................. 79
Ordering Information ...................................................... 80
Package Dimension ........................................................ 80
Major Changes ................................................................ 84
Document Number: 002-07519 Rev. *A
Page 3 of 80
MB95310L/370L Series
1. Product Line-up
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MB95310L Series
Part number
MB95F314E
MB95F316E
MB95F318E
MB95F314L
MB95F316L
MB95F318L
Parameter
Type
Clock supervisor
counter
Flash memory ca-
pacity
RAM capacity
Low-voltage detec-
tion reset
Reset input
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Number of basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Interrupt processing time
: 71
: 68
: 3
It supervises the main clock oscillation.
20 Kbyte
496 bytes
36 Kbyte
1008 bytes
Yes
Dedicated
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8 and 16 bits
: 61.5 ns (machine clock frequency = 16.25 MHz)
: 0.6 µs (machine clock frequency = 16.25 MHz)
60 Kbyte
2032 bytes
20 Kbyte
496 bytes
36 Kbyte
1008 bytes
No
60 Kbyte
2032 bytes
Flash memory product
CPU functions
General-purpose
I/O
Time-base timer
Hardware/software
watchdog timer
Wild register
• I/O ports (Max)
• CMOS I/O
• N-ch open drain
Interval time: 0.256 ms - 8.3 s (external clock frequency = 4 MHz)
• Reset generation cycle
Main oscillation clock at 10 MHz: 105 ms (Min)
• The sub-CR clock can be used as the source clock of the hardware watchdog timer.
It can be used to replace three bytes of data.
1 channel
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Master/Slave sending and receiving
Bus error function and arbitration function
Detecting transmitting direction function
Start condition repeated generation and detection functions
Built-in wake-up function
I
2
C
2 channels
• Data transfer with UART/SIO is enabled.
• It has a full duplex double buffer, variable data length (5/6/7/8 bits), a built-in baud rate generator and an error
detection function.
• It uses the NRZ type transfer format.
• LSB-first data transfer and MSB-first data transfer are available to use.
• Clock-asynchronous (UART) serial data transfer and clock-synchronous (SIO) serial data transfer is enabled.
4 channels
8-bit or 10-bit resolution can be selected.
UART/SIO
8/10-bit A/D con-
verter
(Continued)
Document Number: 002-07519 Rev. *A
Page 4 of 80
MB95310L/370L Series
(Continued)
Part number
MB95F314E
Parameter
2 channels
8/16-bit composite
timer
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Each timer can be configured as an "8-bit timer
2 channels" or a "16-bit timer
1 channel".
It has built-in timer function, PWC function, PWM function and input capture function.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
It can output square wave.
COM output: 4 (Max)
SEG output: 40 (Max)
LCD drive power supply (bias) pin: 4 (Max)
40 SEG
4 COM: 160 pixels can be displayed
Duty LCD mode
Operate in LCD standby mode
Blinking function
Internal divider resistor for LCD drive
Two clock modes and two counter operating modes can be selected
Square waveform output
Count clock: it can be selected from internal clocks (seven types) and external clocks.
Counter operating mode: reload mode or one-shot mode can be selected
MB95F316E
MB95F318E
MB95F314L
MB95F316L
MB95F318L
LCD controller
(LCDC)
1 channel
16-bit reload timer
Event counter
By configuring the 16-bit reload timer and the 8/16-bit composite timer ch. 1, event counter function can be imple-
mented. When the event counter function is used, the 16-bit reload timer and the 8/16-bit composite timer ch. 1 are
unavailable.
2 channels
• Each channel of the PPG can be used as “8-bit PPG
2 channels” or “16-bit PPG
1 channel”
• Counter operating clock: Eight selectable clock sources
• Count clock: Four selectable clock sources (125 ms, 250 ms, 500 ms or 1 s)
• Counter value can be set from 0 to 63. (Capable of counting for 1 minute when selecting clock source of 1 second
and setting counter value to 60)
8 channels
• Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
• It can be used to wake up the device from the standby mode.
• 1-wire serial control
• It supports serial writing. (asynchronous mode)
Eight different time intervals can be selected.
(62.5 ms, 125 ms, 250 ms, 500 ms, 1 s, 2 s, 4 s, 8 s)
• It supports automatic programming, Embedded Algorithm, program/erase/erase-suspend/erase-resume com-
mands.
• It has a flag indicating the completion of the operation of Embedded Algorithm.
• Number of program/erase cycles: 100000
• Data retention time: 20 years
• Flash security feature for protecting the content of the Flash memory
Sleep mode, stop mode, watch mode, time-base timer mode
FPT-80P-M37
8/16-bit PPG
Watch counter
External interrupt
On-chip debug
Watch prescaler
Flash memory
Standby mode
Package
Document Number: 002-07519 Rev. *A
Page 5 of 80