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SN74F373N3

产品描述Bus Driver, F/FAST Series, 1-Func, 8-Bit, True Output, TTL, PDIP20, PLASTIC, MS-001AD, DIP-20
产品类别逻辑    逻辑   
文件大小974KB,共16页
制造商Rochester Electronics
官网地址https://www.rocelec.com/
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SN74F373N3概述

Bus Driver, F/FAST Series, 1-Func, 8-Bit, True Output, TTL, PDIP20, PLASTIC, MS-001AD, DIP-20

SN74F373N3规格参数

参数名称属性值
包装说明DIP,
Reach Compliance Codeunknown
Is SamacsysN
系列F/FAST
JESD-30 代码R-PDIP-T20
长度25.4 mm
逻辑集成电路类型BUS DRIVER
位数8
功能数量1
端口数量2
端子数量20
最高工作温度70 °C
最低工作温度
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码DIP
封装形状RECTANGULAR
封装形式IN-LINE
传播延迟(tpd)13 ns
座面最大高度5.08 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术TTL
温度等级COMMERCIAL
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
宽度7.62 mm
Base Number Matches1

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SN54F373, SN74F373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDFS076A – D2932, MARCH 1987 – REVISED OCTOBER 1993
Eight Latches in a Single Package
3-State Bus-Driving True Outputs
Full Parallel Access for Loading
Buffered Control Inputs
Package Options Include Plastic
Small-Outline (SOIC) and Shrink
Small-Outline (SSOP) Packages, Ceramic
Chip Carriers, and Plastic and Ceramic
DIPs
SN54F373 . . . J PACKAGE
SN74F373 . . . DB, DW, OR N PACKAGE
(TOP VIEW)
description
These 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches of the
′F373
are transparent
D-type latches. While the latch-enable (LE) input
is high, the Q outputs will follow the data (D) inputs.
When the latch enable is taken low, the Q outputs
are latched at the logic levels set up at the D
inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal
logic state (high or low logic levels) or a
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
SN54F373 . . . FK PACKAGE
(TOP VIEW)
1D
1Q
OE
V
CC
2D
2Q
3Q
3D
4D
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
8Q
8D
7D
7Q
6Q
6D
The output-enable (OE) input does not affect the internal operations of the latches. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state.
The SN74F373 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54F373 is characterized for operation over the full military temperature range of – 55°C to 125°C. The
SN74F373 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OE
L
L
L
H
LE
H
H
L
X
D
H
L
X
X
OUTPUT
Q
H
L
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
4Q
GND
LE
5Q
5D
Copyright
©
1993, Texas Instruments Incorporated
1

 
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